Rémi Denis-Courmont 164021423a aarch64: relax byte-swap assembler constraints ... There are no particular reasons to force the compiler to use the same register as output and input operand. This forces an extra MOV instruction if the input value needs to be reused after the swap. In most cases, this makes no differences, as the compiler will seleect the same register for both operands either way. Signed-off-by: Martin Storsjö <martin@martin.st>		2022-09-03 23:54:05 +03:00
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asm.S	aarch64: Only emit the PAC/BTI note section when targeting ELF	2022-03-15 00:44:28 +02:00
bswap.h	aarch64: relax byte-swap assembler constraints	2022-09-03 23:54:05 +03:00
cpu.c	cpu: split flag checks per arch in av_cpu_max_align()	2017-10-09 11:48:24 +02:00
cpu.h	Merge commit '4cf84e254ae75b524e1cacae499a97d7cc9e5906'	2018-02-11 23:08:48 -03:00
float_dsp_init.c
float_dsp_neon.S
Makefile	lavu/tx: implement aarch64 NEON SIMD FFT	2022-08-25 17:40:28 +02:00
neontest.h	all: Add missing header guards	2016-01-28 19:49:48 -08:00
timer.h	arm/aarch64: Use mach_absolute_time as timer on apple platforms	2021-02-21 22:41:34 +02:00
tx_float_init.c	lavu/tx: implement aarch64 NEON SIMD FFT	2022-08-25 17:40:28 +02:00
tx_float_neon.S	lavu/tx: implement aarch64 NEON SIMD FFT	2022-08-25 17:40:28 +02:00