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67360ccd51
Manually load registers to avoid using 8 registers on x86_32 with compilers that do not align the stack (e.g. MSVC). Signed-off-by: Diego Biurrun <diego@biurrun.de>
255 lines
5.6 KiB
NASM
255 lines
5.6 KiB
NASM
;*****************************************************************************
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;* x86-optimized functions for yadif filter
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;*
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;* Copyright (C) 2006 Michael Niedermayer <michaelni@gmx.at>
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;* Copyright (c) 2013 Daniel Kang <daniel.d.kang@gmail.com>
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or modify
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;* it under the terms of the GNU General Public License as published by
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;* the Free Software Foundation; either version 2 of the License, or
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;* (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;* GNU General Public License for more details.
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;*
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;* You should have received a copy of the GNU General Public License along
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;* with Libav; if not, write to the Free Software Foundation, Inc.,
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;* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pb_1: times 16 db 1
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pw_1: times 8 dw 1
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SECTION .text
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%macro CHECK 2
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movu m2, [curq+t1+%1]
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movu m3, [curq+t0+%2]
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mova m4, m2
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mova m5, m2
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pxor m4, m3
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pavgb m5, m3
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pand m4, [pb_1]
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psubusb m5, m4
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%if mmsize == 16
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psrldq m5, 1
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%else
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psrlq m5, 8
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%endif
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punpcklbw m5, m7
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mova m4, m2
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psubusb m2, m3
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psubusb m3, m4
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pmaxub m2, m3
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mova m3, m2
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mova m4, m2
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%if mmsize == 16
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psrldq m3, 1
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psrldq m4, 2
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%else
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psrlq m3, 8
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psrlq m4, 16
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%endif
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punpcklbw m2, m7
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punpcklbw m3, m7
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punpcklbw m4, m7
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paddw m2, m3
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paddw m2, m4
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%endmacro
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%macro CHECK1 0
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mova m3, m0
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pcmpgtw m3, m2
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pminsw m0, m2
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mova m6, m3
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pand m5, m3
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pandn m3, m1
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por m3, m5
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mova m1, m3
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%endmacro
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%macro CHECK2 0
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paddw m6, [pw_1]
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psllw m6, 14
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paddsw m2, m6
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mova m3, m0
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pcmpgtw m3, m2
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pminsw m0, m2
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pand m5, m3
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pandn m3, m1
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por m3, m5
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mova m1, m3
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%endmacro
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%macro LOAD 2
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movh m%1, %2
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punpcklbw m%1, m7
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%endmacro
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%macro FILTER 3
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.loop%1:
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pxor m7, m7
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LOAD 0, [curq+t1]
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LOAD 1, [curq+t0]
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LOAD 2, [%2]
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LOAD 3, [%3]
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mova m4, m3
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paddw m3, m2
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psraw m3, 1
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mova [rsp+ 0], m0
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mova [rsp+16], m3
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mova [rsp+32], m1
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psubw m2, m4
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ABS1 m2, m4
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LOAD 3, [prevq+t1]
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LOAD 4, [prevq+t0]
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psubw m3, m0
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psubw m4, m1
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ABS1 m3, m5
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ABS1 m4, m5
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paddw m3, m4
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psrlw m2, 1
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psrlw m3, 1
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pmaxsw m2, m3
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LOAD 3, [nextq+t1]
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LOAD 4, [nextq+t0]
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psubw m3, m0
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psubw m4, m1
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ABS1 m3, m5
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ABS1 m4, m5
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paddw m3, m4
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psrlw m3, 1
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pmaxsw m2, m3
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mova [rsp+48], m2
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paddw m1, m0
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paddw m0, m0
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psubw m0, m1
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psrlw m1, 1
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ABS1 m0, m2
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movu m2, [curq+t1-1]
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movu m3, [curq+t0-1]
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mova m4, m2
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psubusb m2, m3
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psubusb m3, m4
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pmaxub m2, m3
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%if mmsize == 16
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mova m3, m2
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psrldq m3, 2
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%else
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pshufw m3, m2, q0021
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%endif
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punpcklbw m2, m7
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punpcklbw m3, m7
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paddw m0, m2
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paddw m0, m3
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psubw m0, [pw_1]
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CHECK -2, 0
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CHECK1
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CHECK -3, 1
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CHECK2
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CHECK 0, -2
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CHECK1
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CHECK 1, -3
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CHECK2
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mova m6, [rsp+48]
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cmp DWORD r8m, 2
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jge .end%1
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LOAD 2, [%2+t1*2]
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LOAD 4, [%3+t1*2]
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LOAD 3, [%2+t0*2]
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LOAD 5, [%3+t0*2]
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paddw m2, m4
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paddw m3, m5
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psrlw m2, 1
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psrlw m3, 1
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mova m4, [rsp+ 0]
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mova m5, [rsp+16]
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mova m7, [rsp+32]
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psubw m2, m4
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psubw m3, m7
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mova m0, m5
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psubw m5, m4
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psubw m0, m7
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mova m4, m2
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pminsw m2, m3
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pmaxsw m3, m4
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pmaxsw m2, m5
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pminsw m3, m5
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pmaxsw m2, m0
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pminsw m3, m0
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pxor m4, m4
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pmaxsw m6, m3
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psubw m4, m2
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pmaxsw m6, m4
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.end%1:
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mova m2, [rsp+16]
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mova m3, m2
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psubw m2, m6
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paddw m3, m6
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pmaxsw m1, m2
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pminsw m1, m3
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packuswb m1, m1
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movh [dstq], m1
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add dstq, mmsize/2
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add prevq, mmsize/2
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add curq, mmsize/2
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add nextq, mmsize/2
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sub DWORD r4m, mmsize/2
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jg .loop%1
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%endmacro
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%macro YADIF 0
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%if ARCH_X86_32
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cglobal yadif_filter_line, 4, 6, 8, 80, dst, prev, cur, next, w, prefs, \
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mrefs, parity, mode
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%else
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cglobal yadif_filter_line, 4, 7, 8, 80, dst, prev, cur, next, w, prefs, \
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mrefs, parity, mode
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%endif
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cmp DWORD wm, 0
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jle .ret
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%if ARCH_X86_32
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mov r4, r5mp
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mov r5, r6mp
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DECLARE_REG_TMP 4,5
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%else
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movsxd r5, DWORD r5m
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movsxd r6, DWORD r6m
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DECLARE_REG_TMP 5,6
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%endif
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cmp DWORD paritym, 0
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je .parity0
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FILTER 1, prevq, curq
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jmp .ret
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.parity0:
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FILTER 0, curq, nextq
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.ret:
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RET
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%endmacro
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INIT_XMM ssse3
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YADIF
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INIT_XMM sse2
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YADIF
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%if ARCH_X86_32
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INIT_MMX mmxext
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YADIF
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%endif
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