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cdb1665f70
Previously, ff_h264_idct_add_neon (originally in the arm version) used
a non-regular transpose in order to be able to use more instructions
that deal with registers as 128 bit register pairs. The aarch64
translation doesn't do it to the same extent, but brought along the
same structure since it was a straight translation.
This reshuffles ff_h264_idct_add_neon, bringing it closer to
the C implementation, making the transpose_4x4H macro do a regular
transpose, usable for other algorithms as well.
Previously, the third and fourth output from transpose_4x4H were
swapped, and prior to cc29d96d5a, the same inputs as well. In
addition to just swapping the outputs, also renumber the intermediate
registers for better readability (making the register order match
transpose_4x8B).
This runs with the same number of cycles as before.
Signed-off-by: Martin Storsjö <martin@martin.st>
409 lines
16 KiB
ArmAsm
409 lines
16 KiB
ArmAsm
/*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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* Copyright (c) 2013 Janne Grunau <janne-libav@jannau.net>
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/aarch64/asm.S"
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#include "neon.S"
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function ff_h264_idct_add_neon, export=1
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ld1 {v0.4H, v1.4H, v2.4H, v3.4H}, [x1]
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sxtw x2, w2
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movi v30.8H, #0
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add v4.4H, v0.4H, v2.4H
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sshr v16.4H, v1.4H, #1
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st1 {v30.8H}, [x1], #16
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sshr v17.4H, v3.4H, #1
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st1 {v30.8H}, [x1], #16
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sub v5.4H, v0.4H, v2.4H
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sub v6.4H, v16.4H, v3.4H
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add v7.4H, v1.4H, v17.4H
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add v0.4H, v4.4H, v7.4H
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add v1.4H, v5.4H, v6.4H
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sub v2.4H, v5.4H, v6.4H
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sub v3.4H, v4.4H, v7.4H
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transpose_4x4H v0, v1, v2, v3, v4, v5, v6, v7
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add v4.4H, v0.4H, v2.4H
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ld1 {v18.S}[0], [x0], x2
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sshr v16.4H, v3.4H, #1
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sshr v17.4H, v1.4H, #1
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ld1 {v18.S}[1], [x0], x2
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sub v5.4H, v0.4H, v2.4H
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ld1 {v19.S}[1], [x0], x2
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add v6.4H, v16.4H, v1.4H
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ins v4.D[1], v5.D[0]
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sub v7.4H, v17.4H, v3.4H
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ld1 {v19.S}[0], [x0], x2
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ins v6.D[1], v7.D[0]
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sub x0, x0, x2, lsl #2
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add v0.8H, v4.8H, v6.8H
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sub v1.8H, v4.8H, v6.8H
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srshr v0.8H, v0.8H, #6
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srshr v1.8H, v1.8H, #6
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uaddw v0.8H, v0.8H, v18.8B
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uaddw v1.8H, v1.8H, v19.8B
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sqxtun v0.8B, v0.8H
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sqxtun v1.8B, v1.8H
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st1 {v0.S}[0], [x0], x2
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st1 {v0.S}[1], [x0], x2
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st1 {v1.S}[1], [x0], x2
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st1 {v1.S}[0], [x0], x2
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sub x1, x1, #32
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ret
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endfunc
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function ff_h264_idct_dc_add_neon, export=1
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sxtw x2, w2
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mov w3, #0
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ld1r {v2.8H}, [x1]
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strh w3, [x1]
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srshr v2.8H, v2.8H, #6
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ld1 {v0.S}[0], [x0], x2
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ld1 {v0.S}[1], [x0], x2
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uaddw v3.8H, v2.8H, v0.8B
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ld1 {v1.S}[0], [x0], x2
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ld1 {v1.S}[1], [x0], x2
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uaddw v4.8H, v2.8H, v1.8B
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sqxtun v0.8B, v3.8H
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sqxtun v1.8B, v4.8H
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sub x0, x0, x2, lsl #2
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st1 {v0.S}[0], [x0], x2
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st1 {v0.S}[1], [x0], x2
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st1 {v1.S}[0], [x0], x2
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st1 {v1.S}[1], [x0], x2
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ret
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endfunc
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function ff_h264_idct_add16_neon, export=1
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mov x12, x30
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mov x6, x0 // dest
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mov x5, x1 // block_offset
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mov x1, x2 // block
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mov w9, w3 // stride
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movrel x7, scan8
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mov x10, #16
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movrel x13, X(ff_h264_idct_dc_add_neon)
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movrel x14, X(ff_h264_idct_add_neon)
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1: mov w2, w9
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ldrb w3, [x7], #1
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ldrsw x0, [x5], #4
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ldrb w3, [x4, w3, uxtw]
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subs w3, w3, #1
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b.lt 2f
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ldrsh w3, [x1]
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add x0, x0, x6
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ccmp w3, #0, #4, eq
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csel x15, x13, x14, ne
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blr x15
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2: subs x10, x10, #1
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add x1, x1, #32
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b.ne 1b
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ret x12
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endfunc
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function ff_h264_idct_add16intra_neon, export=1
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mov x12, x30
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mov x6, x0 // dest
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mov x5, x1 // block_offset
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mov x1, x2 // block
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mov w9, w3 // stride
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movrel x7, scan8
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mov x10, #16
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movrel x13, X(ff_h264_idct_dc_add_neon)
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movrel x14, X(ff_h264_idct_add_neon)
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1: mov w2, w9
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ldrb w3, [x7], #1
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ldrsw x0, [x5], #4
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ldrb w3, [x4, w3, uxtw]
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add x0, x0, x6
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cmp w3, #0
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ldrsh w3, [x1]
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csel x15, x13, x14, eq
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ccmp w3, #0, #0, eq
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b.eq 2f
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blr x15
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2: subs x10, x10, #1
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add x1, x1, #32
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b.ne 1b
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ret x12
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endfunc
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function ff_h264_idct_add8_neon, export=1
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sub sp, sp, #0x40
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stp x19, x20, [sp]
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mov x12, x30
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ldp x6, x15, [x0] // dest[0], dest[1]
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add x5, x1, #16*4 // block_offset
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add x9, x2, #16*32 // block
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mov w19, w3 // stride
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movrel x13, X(ff_h264_idct_dc_add_neon)
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movrel x14, X(ff_h264_idct_add_neon)
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movrel x7, scan8+16
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mov x10, #0
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mov x11, #16
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1: mov w2, w19
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ldrb w3, [x7, x10] // scan8[i]
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ldrsw x0, [x5, x10, lsl #2] // block_offset[i]
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ldrb w3, [x4, w3, uxtw] // nnzc[ scan8[i] ]
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add x0, x0, x6 // block_offset[i] + dst[j-1]
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add x1, x9, x10, lsl #5 // block + i * 16
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cmp w3, #0
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ldrsh w3, [x1] // block[i*16]
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csel x20, x13, x14, eq
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ccmp w3, #0, #0, eq
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b.eq 2f
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blr x20
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2: add x10, x10, #1
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cmp x10, #4
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csel x10, x11, x10, eq // mov x10, #16
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csel x6, x15, x6, eq
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cmp x10, #20
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b.lt 1b
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ldp x19, x20, [sp]
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add sp, sp, #0x40
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ret x12
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endfunc
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.macro idct8x8_cols pass
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.if \pass == 0
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va .req v18
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vb .req v30
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sshr v18.8H, v26.8H, #1
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add v16.8H, v24.8H, v28.8H
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ld1 {v30.8H, v31.8H}, [x1]
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st1 {v19.8H}, [x1], #16
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st1 {v19.8H}, [x1], #16
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sub v17.8H, v24.8H, v28.8H
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sshr v19.8H, v30.8H, #1
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sub v18.8H, v18.8H, v30.8H
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add v19.8H, v19.8H, v26.8H
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.else
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va .req v30
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vb .req v18
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sshr v30.8H, v26.8H, #1
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sshr v19.8H, v18.8H, #1
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add v16.8H, v24.8H, v28.8H
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sub v17.8H, v24.8H, v28.8H
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sub v30.8H, v30.8H, v18.8H
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add v19.8H, v19.8H, v26.8H
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.endif
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add v26.8H, v17.8H, va.8H
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sub v28.8H, v17.8H, va.8H
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add v24.8H, v16.8H, v19.8H
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sub vb.8H, v16.8H, v19.8H
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sub v16.8H, v29.8H, v27.8H
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add v17.8H, v31.8H, v25.8H
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sub va.8H, v31.8H, v25.8H
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add v19.8H, v29.8H, v27.8H
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sub v16.8H, v16.8H, v31.8H
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sub v17.8H, v17.8H, v27.8H
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add va.8H, va.8H, v29.8H
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add v19.8H, v19.8H, v25.8H
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sshr v25.8H, v25.8H, #1
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sshr v27.8H, v27.8H, #1
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sshr v29.8H, v29.8H, #1
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sshr v31.8H, v31.8H, #1
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sub v16.8H, v16.8H, v31.8H
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sub v17.8H, v17.8H, v27.8H
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add va.8H, va.8H, v29.8H
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add v19.8H, v19.8H, v25.8H
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sshr v25.8H, v16.8H, #2
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sshr v27.8H, v17.8H, #2
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sshr v29.8H, va.8H, #2
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sshr v31.8H, v19.8H, #2
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sub v19.8H, v19.8H, v25.8H
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sub va.8H, v27.8H, va.8H
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add v17.8H, v17.8H, v29.8H
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add v16.8H, v16.8H, v31.8H
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.if \pass == 0
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sub v31.8H, v24.8H, v19.8H
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add v24.8H, v24.8H, v19.8H
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add v25.8H, v26.8H, v18.8H
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sub v18.8H, v26.8H, v18.8H
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add v26.8H, v28.8H, v17.8H
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add v27.8H, v30.8H, v16.8H
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sub v29.8H, v28.8H, v17.8H
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sub v28.8H, v30.8H, v16.8H
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.else
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sub v31.8H, v24.8H, v19.8H
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add v24.8H, v24.8H, v19.8H
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add v25.8H, v26.8H, v30.8H
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sub v30.8H, v26.8H, v30.8H
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add v26.8H, v28.8H, v17.8H
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sub v29.8H, v28.8H, v17.8H
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add v27.8H, v18.8H, v16.8H
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sub v28.8H, v18.8H, v16.8H
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.endif
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.unreq va
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.unreq vb
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.endm
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function ff_h264_idct8_add_neon, export=1
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movi v19.8H, #0
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ld1 {v24.8H, v25.8H}, [x1]
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st1 {v19.8H}, [x1], #16
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st1 {v19.8H}, [x1], #16
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ld1 {v26.8H, v27.8H}, [x1]
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st1 {v19.8H}, [x1], #16
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st1 {v19.8H}, [x1], #16
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ld1 {v28.8H, v29.8H}, [x1]
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st1 {v19.8H}, [x1], #16
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st1 {v19.8H}, [x1], #16
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idct8x8_cols 0
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transpose_8x8H v24, v25, v26, v27, v28, v29, v18, v31, v6, v7
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idct8x8_cols 1
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mov x3, x0
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srshr v24.8H, v24.8H, #6
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ld1 {v0.8B}, [x0], x2
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srshr v25.8H, v25.8H, #6
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ld1 {v1.8B}, [x0], x2
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srshr v26.8H, v26.8H, #6
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ld1 {v2.8B}, [x0], x2
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srshr v27.8H, v27.8H, #6
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ld1 {v3.8B}, [x0], x2
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srshr v28.8H, v28.8H, #6
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ld1 {v4.8B}, [x0], x2
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srshr v29.8H, v29.8H, #6
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ld1 {v5.8B}, [x0], x2
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srshr v30.8H, v30.8H, #6
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ld1 {v6.8B}, [x0], x2
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srshr v31.8H, v31.8H, #6
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ld1 {v7.8B}, [x0], x2
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uaddw v24.8H, v24.8H, v0.8B
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uaddw v25.8H, v25.8H, v1.8B
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uaddw v26.8H, v26.8H, v2.8B
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sqxtun v0.8B, v24.8H
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uaddw v27.8H, v27.8H, v3.8B
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sqxtun v1.8B, v25.8H
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uaddw v28.8H, v28.8H, v4.8B
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sqxtun v2.8B, v26.8H
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st1 {v0.8B}, [x3], x2
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uaddw v29.8H, v29.8H, v5.8B
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sqxtun v3.8B, v27.8H
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st1 {v1.8B}, [x3], x2
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uaddw v30.8H, v30.8H, v6.8B
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sqxtun v4.8B, v28.8H
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st1 {v2.8B}, [x3], x2
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uaddw v31.8H, v31.8H, v7.8B
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sqxtun v5.8B, v29.8H
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st1 {v3.8B}, [x3], x2
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sqxtun v6.8B, v30.8H
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sqxtun v7.8B, v31.8H
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st1 {v4.8B}, [x3], x2
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st1 {v5.8B}, [x3], x2
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st1 {v6.8B}, [x3], x2
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st1 {v7.8B}, [x3], x2
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sub x1, x1, #128
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ret
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endfunc
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function ff_h264_idct8_dc_add_neon, export=1
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mov w3, #0
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sxtw x2, w2
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ld1r {v31.8H}, [x1]
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strh w3, [x1]
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ld1 {v0.8B}, [x0], x2
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srshr v31.8H, v31.8H, #6
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ld1 {v1.8B}, [x0], x2
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ld1 {v2.8B}, [x0], x2
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uaddw v24.8H, v31.8H, v0.8B
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ld1 {v3.8B}, [x0], x2
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uaddw v25.8H, v31.8H, v1.8B
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ld1 {v4.8B}, [x0], x2
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uaddw v26.8H, v31.8H, v2.8B
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ld1 {v5.8B}, [x0], x2
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uaddw v27.8H, v31.8H, v3.8B
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ld1 {v6.8B}, [x0], x2
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uaddw v28.8H, v31.8H, v4.8B
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ld1 {v7.8B}, [x0], x2
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uaddw v29.8H, v31.8H, v5.8B
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uaddw v30.8H, v31.8H, v6.8B
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uaddw v31.8H, v31.8H, v7.8B
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sqxtun v0.8B, v24.8H
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sqxtun v1.8B, v25.8H
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sqxtun v2.8B, v26.8H
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sqxtun v3.8B, v27.8H
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sub x0, x0, x2, lsl #3
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st1 {v0.8B}, [x0], x2
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sqxtun v4.8B, v28.8H
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st1 {v1.8B}, [x0], x2
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sqxtun v5.8B, v29.8H
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st1 {v2.8B}, [x0], x2
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sqxtun v6.8B, v30.8H
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st1 {v3.8B}, [x0], x2
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sqxtun v7.8B, v31.8H
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st1 {v4.8B}, [x0], x2
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st1 {v5.8B}, [x0], x2
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st1 {v6.8B}, [x0], x2
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st1 {v7.8B}, [x0], x2
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ret
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endfunc
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function ff_h264_idct8_add4_neon, export=1
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mov x12, x30
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mov x6, x0
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mov x5, x1
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mov x1, x2
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mov w2, w3
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movrel x7, scan8
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mov w10, #16
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movrel x13, X(ff_h264_idct8_dc_add_neon)
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movrel x14, X(ff_h264_idct8_add_neon)
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1: ldrb w9, [x7], #4
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ldrsw x0, [x5], #16
|
|
ldrb w9, [x4, w9, UXTW]
|
|
subs w9, w9, #1
|
|
b.lt 2f
|
|
ldrsh w11, [x1]
|
|
add x0, x6, x0
|
|
ccmp w11, #0, #4, eq
|
|
csel x15, x13, x14, ne
|
|
blr x15
|
|
2: subs w10, w10, #4
|
|
add x1, x1, #128
|
|
b.ne 1b
|
|
ret x12
|
|
endfunc
|
|
|
|
const scan8
|
|
.byte 4+ 1*8, 5+ 1*8, 4+ 2*8, 5+ 2*8
|
|
.byte 6+ 1*8, 7+ 1*8, 6+ 2*8, 7+ 2*8
|
|
.byte 4+ 3*8, 5+ 3*8, 4+ 4*8, 5+ 4*8
|
|
.byte 6+ 3*8, 7+ 3*8, 6+ 4*8, 7+ 4*8
|
|
.byte 4+ 6*8, 5+ 6*8, 4+ 7*8, 5+ 7*8
|
|
.byte 6+ 6*8, 7+ 6*8, 6+ 7*8, 7+ 7*8
|
|
.byte 4+ 8*8, 5+ 8*8, 4+ 9*8, 5+ 9*8
|
|
.byte 6+ 8*8, 7+ 8*8, 6+ 9*8, 7+ 9*8
|
|
.byte 4+11*8, 5+11*8, 4+12*8, 5+12*8
|
|
.byte 6+11*8, 7+11*8, 6+12*8, 7+12*8
|
|
.byte 4+13*8, 5+13*8, 4+14*8, 5+14*8
|
|
.byte 6+13*8, 7+13*8, 6+14*8, 7+14*8
|
|
endconst
|