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4cb6964244
The vector dequantization has a test in a loop preventing effective SIMD
implementation. By moving it out of the loop, this loop can be DSPized.
Therefore, modify the current DSP implementation. In particular, the
DSP implementation no longer has to handle null loop sizes.
The decode_hf implementations have following timings:
For x86 Arrandale:
C SSE SSE2 SSE4
win32: 260 162 119 104
win64: 242 N/A 89 72
The arm NEON optimizations follow in a later patch as external asm. The
now unused check for the y modifier in arm inline asm is removed from
configure.
353 lines
9.4 KiB
NASM
353 lines
9.4 KiB
NASM
;******************************************************************************
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;* SSE-optimized functions for the DCA decoder
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;* Copyright (C) 2012-2014 Christophe Gisquet <christophe.gisquet@gmail.com>
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with Libav; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pf_inv16: times 4 dd 0x3D800000 ; 1/16
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SECTION_TEXT
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; void decode_hf(float dst[DCA_SUBBANDS][8], const int32_t vq_num[DCA_SUBBANDS],
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; const int8_t hf_vq[1024][32], intptr_t vq_offset,
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; int32_t scale[DCA_SUBBANDS][2], intptr_t start, intptr_t end)
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%macro DECODE_HF 0
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cglobal decode_hf, 6,6,5, dst, num, src, offset, scale, start, end
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lea srcq, [srcq + offsetq]
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shl startq, 2
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mov offsetd, endm
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%define DICT offsetq
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shl offsetq, 2
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mov endm, offsetq
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.loop:
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%if ARCH_X86_64
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mov offsetd, [scaleq + 2 * startq]
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cvtsi2ss m0, offsetd
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%else
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cvtsi2ss m0, [scaleq + 2 * startq]
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%endif
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mov offsetd, [numq + startq]
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mulss m0, [pf_inv16]
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shl DICT, 5
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shufps m0, m0, 0
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%if cpuflag(sse2)
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%if cpuflag(sse4)
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pmovsxbd m1, [srcq + DICT + 0]
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pmovsxbd m2, [srcq + DICT + 4]
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%else
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movq m1, [srcq + DICT]
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punpcklbw m1, m1
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mova m2, m1
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punpcklwd m1, m1
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punpckhwd m2, m2
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psrad m1, 24
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psrad m2, 24
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%endif
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cvtdq2ps m1, m1
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cvtdq2ps m2, m2
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%else
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movd mm0, [srcq + DICT + 0]
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movd mm1, [srcq + DICT + 4]
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punpcklbw mm0, mm0
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punpcklbw mm1, mm1
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movq mm2, mm0
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movq mm3, mm1
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punpcklwd mm0, mm0
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punpcklwd mm1, mm1
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punpckhwd mm2, mm2
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punpckhwd mm3, mm3
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psrad mm0, 24
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psrad mm1, 24
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psrad mm2, 24
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psrad mm3, 24
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cvtpi2ps m1, mm0
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cvtpi2ps m2, mm1
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cvtpi2ps m3, mm2
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cvtpi2ps m4, mm3
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shufps m0, m0, 0
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shufps m1, m3, q1010
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shufps m2, m4, q1010
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%endif
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mulps m1, m0
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mulps m2, m0
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mova [dstq + 8 * startq + 0], m1
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mova [dstq + 8 * startq + 16], m2
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add startq, 4
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cmp startq, endm
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jl .loop
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.end:
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%if notcpuflag(sse2)
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emms
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%endif
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REP_RET
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%endmacro
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%if ARCH_X86_32
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INIT_XMM sse
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DECODE_HF
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%endif
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INIT_XMM sse2
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DECODE_HF
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INIT_XMM sse4
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DECODE_HF
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; %1=v0/v1 %2=in1 %3=in2
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%macro FIR_LOOP 2-3
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.loop%1:
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%define va m1
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%define vb m2
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%if %1
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%define OFFSET 0
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%else
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%define OFFSET NUM_COEF*count
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%endif
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; for v0, incrementing and for v1, decrementing
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mova va, [cf0q + OFFSET]
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mova vb, [cf0q + OFFSET + 4*NUM_COEF]
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%if %0 == 3
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mova m4, [cf0q + OFFSET + mmsize]
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mova m0, [cf0q + OFFSET + 4*NUM_COEF + mmsize]
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%endif
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mulps va, %2
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mulps vb, %2
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%if %0 == 3
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mulps m4, %3
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mulps m0, %3
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addps va, m4
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addps vb, m0
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%endif
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; va = va1 va2 va3 va4
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; vb = vb1 vb2 vb3 vb4
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%if %1
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SWAP va, vb
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%endif
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mova m4, va
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unpcklps va, vb ; va3 vb3 va4 vb4
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unpckhps m4, vb ; va1 vb1 va2 vb2
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addps m4, va ; va1+3 vb1+3 va2+4 vb2+4
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movhlps vb, m4 ; va1+3 vb1+3
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addps vb, m4 ; va0..4 vb0..4
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movh [outq + count], vb
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%if %1
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sub cf0q, 8*NUM_COEF
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%endif
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add count, 8
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jl .loop%1
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%endmacro
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; void dca_lfe_fir(float *out, float *in, float *coefs)
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%macro DCA_LFE_FIR 1
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cglobal dca_lfe_fir%1, 3,3,6-%1, out, in, cf0
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%define IN1 m3
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%define IN2 m5
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%define count inq
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%define NUM_COEF 4*(2-%1)
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%define NUM_OUT 32*(%1+1)
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movu IN1, [inq + 4 - 1*mmsize]
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shufps IN1, IN1, q0123
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%if %1 == 0
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movu IN2, [inq + 4 - 2*mmsize]
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shufps IN2, IN2, q0123
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%endif
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mov count, -4*NUM_OUT
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add cf0q, 4*NUM_COEF*NUM_OUT
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add outq, 4*NUM_OUT
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; compute v0 first
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%if %1 == 0
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FIR_LOOP 0, IN1, IN2
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%else
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FIR_LOOP 0, IN1
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%endif
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shufps IN1, IN1, q0123
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mov count, -4*NUM_OUT
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; cf1 already correctly positioned
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add outq, 4*NUM_OUT ; outq now at out2
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sub cf0q, 8*NUM_COEF
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%if %1 == 0
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shufps IN2, IN2, q0123
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FIR_LOOP 1, IN2, IN1
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%else
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FIR_LOOP 1, IN1
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%endif
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RET
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%endmacro
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INIT_XMM sse
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DCA_LFE_FIR 0
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DCA_LFE_FIR 1
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INIT_XMM sse2
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%macro INNER_LOOP 1
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; reading backwards: ptr1 = synth_buf + j + i; ptr2 = synth_buf + j - i
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;~ a += window[i + j] * (-synth_buf[15 - i + j])
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;~ b += window[i + j + 16] * (synth_buf[i + j])
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pshufd m5, [ptr2 + j + (15 - 3) * 4], q0123
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mova m6, [ptr1 + j]
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%if ARCH_X86_64
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pshufd m11, [ptr2 + j + (15 - 3) * 4 - mmsize], q0123
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mova m12, [ptr1 + j + mmsize]
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%endif
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mulps m6, [win + %1 + j + 16 * 4]
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mulps m5, [win + %1 + j]
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%if ARCH_X86_64
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mulps m12, [win + %1 + j + mmsize + 16 * 4]
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mulps m11, [win + %1 + j + mmsize]
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%endif
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addps m2, m6
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subps m1, m5
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%if ARCH_X86_64
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addps m8, m12
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subps m7, m11
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%endif
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;~ c += window[i + j + 32] * (synth_buf[16 + i + j])
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;~ d += window[i + j + 48] * (synth_buf[31 - i + j])
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pshufd m6, [ptr2 + j + (31 - 3) * 4], q0123
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mova m5, [ptr1 + j + 16 * 4]
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%if ARCH_X86_64
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pshufd m12, [ptr2 + j + (31 - 3) * 4 - mmsize], q0123
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mova m11, [ptr1 + j + mmsize + 16 * 4]
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%endif
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mulps m5, [win + %1 + j + 32 * 4]
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mulps m6, [win + %1 + j + 48 * 4]
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%if ARCH_X86_64
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mulps m11, [win + %1 + j + mmsize + 32 * 4]
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mulps m12, [win + %1 + j + mmsize + 48 * 4]
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%endif
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addps m3, m5
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addps m4, m6
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%if ARCH_X86_64
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addps m9, m11
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addps m10, m12
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%endif
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sub j, 64 * 4
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%endmacro
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; void ff_synth_filter_inner_sse2(float *synth_buf, float synth_buf2[32],
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; const float window[512], float out[32],
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; intptr_t offset, float scale)
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cglobal synth_filter_inner, 0, 6 + 4 * ARCH_X86_64, 7 + 6 * ARCH_X86_64, \
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synth_buf, synth_buf2, window, out, off, scale
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%define scale m0
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%if ARCH_X86_32 || WIN64
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movd scale, scalem
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; Make sure offset is in a register and not on the stack
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%define OFFQ r4q
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%else
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%define OFFQ offq
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%endif
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pshufd m0, m0, 0
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; prepare inner counter limit 1
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mov r5q, 480
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sub r5q, offmp
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and r5q, -64
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shl r5q, 2
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mov OFFQ, r5q
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%define i r5q
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mov i, 16 * 4 - (ARCH_X86_64 + 1) * mmsize ; main loop counter
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%define buf2 synth_buf2q
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%if ARCH_X86_32
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mov buf2, synth_buf2mp
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%endif
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.mainloop
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; m1 = a m2 = b m3 = c m4 = d
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pxor m3, m3
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pxor m4, m4
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mova m1, [buf2 + i]
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mova m2, [buf2 + i + 16 * 4]
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%if ARCH_X86_32
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%define ptr1 r0q
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%define ptr2 r1q
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%define win r2q
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%define j r3q
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mov win, windowm
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mov ptr1, synth_bufm
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add win, i
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add ptr1, i
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%else ; ARCH_X86_64
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%define ptr1 r6q
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%define ptr2 r7q ; must be loaded
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%define win r8q
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%define j r9q
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pxor m9, m9
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pxor m10, m10
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mova m7, [buf2 + i + mmsize]
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mova m8, [buf2 + i + mmsize + 16 * 4]
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lea win, [windowq + i]
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lea ptr1, [synth_bufq + i]
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%endif
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mov ptr2, synth_bufmp
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; prepare the inner loop counter
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mov j, OFFQ
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sub ptr2, i
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.loop1:
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INNER_LOOP 0
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jge .loop1
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mov j, 448 * 4
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sub j, OFFQ
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jz .end
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sub ptr1, j
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sub ptr2, j
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add win, OFFQ ; now at j-64, so define OFFSET
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sub j, 64 * 4
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.loop2:
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INNER_LOOP 64 * 4
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jge .loop2
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.end:
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%if ARCH_X86_32
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mov buf2, synth_buf2m ; needed for next iteration anyway
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mov outq, outmp ; j, which will be set again during it
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%endif
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;~ out[i] = a * scale;
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;~ out[i + 16] = b * scale;
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mulps m1, scale
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mulps m2, scale
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%if ARCH_X86_64
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mulps m7, scale
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mulps m8, scale
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%endif
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;~ synth_buf2[i] = c;
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;~ synth_buf2[i + 16] = d;
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mova [buf2 + i + 0 * 4], m3
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mova [buf2 + i + 16 * 4], m4
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%if ARCH_X86_64
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mova [buf2 + i + 0 * 4 + mmsize], m9
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mova [buf2 + i + 16 * 4 + mmsize], m10
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%endif
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;~ out[i] = a;
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;~ out[i + 16] = a;
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mova [outq + i + 0 * 4], m1
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mova [outq + i + 16 * 4], m2
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%if ARCH_X86_64
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mova [outq + i + 0 * 4 + mmsize], m7
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mova [outq + i + 16 * 4 + mmsize], m8
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%endif
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sub i, (ARCH_X86_64 + 1) * mmsize
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jge .mainloop
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RET
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