mirror of
https://github.com/FFmpeg/FFmpeg.git
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a72d0fb973
Saves 1 gpr and 2 instructions and simplifies the macros a bit. Signed-off-by: Rostislav Pehlivanov <atomnuker@gmail.com>
222 lines
7.7 KiB
NASM
222 lines
7.7 KiB
NASM
;******************************************************************************
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;* SIMD optimized non-power-of-two MDCT functions
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;*
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;* Copyright (C) 2017 Rostislav Pehlivanov <atomnuker@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 32
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perm_neg: dd 2, 5, 3, 4, 6, 1, 7, 0
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perm_pos: dd 0, 7, 1, 6, 4, 3, 5, 2
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sign_adjust_r: times 4 dd 0x80000000, 0x00000000
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sign_adjust_5: dd 0x00000000, 0x80000000, 0x80000000, 0x00000000
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SECTION .text
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%if ARCH_X86_64
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;*****************************************************************************************
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;void ff_fft15_avx(FFTComplex *out, FFTComplex *in, FFTComplex *exptab, ptrdiff_t stride);
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;*****************************************************************************************
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%macro FFT5 3 ; %1 - in_offset, %2 - dst1 (64bit used), %3 - dst2
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VBROADCASTSD m0, [inq + %1] ; in[ 0].re, in[ 0].im, in[ 0].re, in[ 0].im
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movsd xm1, [inq + 1*16 + 8 + %1] ; in[ 3].re, in[ 3].im, 0, 0
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movsd xm4, [inq + 6*16 + 0 + %1] ; in[12].re, in[12].im, 0, 0
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movhps xm1, [inq + 3*16 + 0 + %1] ; in[ 3].re, in[ 3].im, in[ 6].re, in[ 6].im
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movhps xm4, [inq + 4*16 + 8 + %1] ; in[12].re, in[12].im, in[ 9].re, in[ 9].im
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subps xm2, xm1, xm4 ; t[2].im, t[2].re, t[3].im, t[3].re
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addps xm1, xm4 ; t[0].re, t[0].im, t[1].re, t[1].im
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movhlps %2, xm1 ; t[0].re, t[1].re, t[0].im, t[1].im
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addps %2, xm1
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addps %2, xm0 ; DC[0].re, DC[0].im, junk...
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movlhps %2, %2 ; DC[0].re, DC[0].im, DC[0].re, DC[0].im
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shufps xm3, xm1, xm2, q0110 ; t[0].re, t[0].im, t[2].re, t[2].im
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shufps xm1, xm2, q2332 ; t[1].re, t[1].im, t[3].re, t[3].im
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mulps xm%3, xm1, xm5
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mulps xm4, xm3, xm6
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mulps xm1, xm6
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xorps xm1, xm7
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mulps xm3, xm5
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addsubps xm3, xm1 ; t[0].re, t[0].im, t[2].re, t[2].im
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subps xm%3, xm4 ; t[4].re, t[4].im, t[5].re, t[5].im
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movhlps xm2, xm%3, xm3 ; t[2].re, t[2].im, t[5].re, t[5].im
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movlhps xm3, xm%3 ; t[0].re, t[0].im, t[4].re, t[4].im
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xorps xm2, xm7
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addps xm%3, xm2, xm3
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subps xm3, xm2
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shufps xm3, xm3, q1032
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vinsertf128 m%3, m%3, xm3, 1 ; All ACs (tmp[1] through to tmp[4])
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addps m%3, m%3, m0 ; Finally offset with DCs
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%endmacro
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%macro BUTTERFLIES_DC 1 ; %1 - exptab_offset
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mulps xm0, xm9, [exptabq + %1 + 16*0]
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mulps xm1, xm10, [exptabq + %1 + 16*1]
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haddps xm0, xm1
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movhlps xm1, xm0 ; t[0].re, t[1].re, t[0].im, t[1].im
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addps xm0, xm1
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addps xm0, xm8
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movsd [outq], xm0
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%endmacro
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%macro BUTTERFLIES_AC 1 ; %1 - exptab_offset
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mulps m0, m12, [exptabq + 64*0 + 0*mmsize + %1]
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mulps m1, m12, [exptabq + 64*0 + 1*mmsize + %1]
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mulps m2, m13, [exptabq + 64*1 + 0*mmsize + %1]
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mulps m3, m13, [exptabq + 64*1 + 1*mmsize + %1]
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addps m0, m0, m2
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addps m1, m1, m3
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addps m0, m0, m11
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shufps m1, m1, m1, q2301
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addps m0, m0, m1
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vextractf128 xm1, m0, 1
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movlps [outq + strideq*1], xm0
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movhps [outq + strideq*2], xm0
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movlps [outq + stride3q], xm1
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movhps [outq + strideq*4], xm1
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%endmacro
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INIT_YMM avx
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cglobal fft15, 4, 5, 14, out, in, exptab, stride, stride5
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shl strideq, 3
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movaps xm5, [exptabq + 480 + 16*0]
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movaps xm6, [exptabq + 480 + 16*1]
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movaps xm7, [sign_adjust_5]
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FFT5 0, xm8, 11
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FFT5 8, xm9, 12
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FFT5 16, xm10, 13
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%define stride3q inq
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lea stride3q, [strideq + strideq*2]
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lea stride5q, [strideq + strideq*4]
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BUTTERFLIES_DC (8*6 + 4*0)*2*4
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BUTTERFLIES_AC (8*0 + 0*0)*2*4
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add outq, stride5q
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BUTTERFLIES_DC (8*6 + 4*1)*2*4
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BUTTERFLIES_AC (8*2 + 0*0)*2*4
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add outq, stride5q
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BUTTERFLIES_DC (8*6 + 4*2)*2*4
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BUTTERFLIES_AC (8*4 + 0*0)*2*4
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RET
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%endif ; ARCH_X86_64
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;*******************************************************************************************************
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;void ff_mdct15_postreindex(FFTComplex *out, FFTComplex *in, FFTComplex *exp, int *lut, ptrdiff_t len8);
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;*******************************************************************************************************
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%macro LUT_LOAD_4D 3
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mov r4d, [lutq + %3q*4 + 0]
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movsd xmm%1, [inq + r4q*8]
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mov r4d, [lutq + %3q*4 + 4]
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movhps xmm%1, [inq + r4q*8]
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%if cpuflag(avx2)
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mov r4d, [lutq + %3q*4 + 8]
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movsd %2, [inq + r4q*8]
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mov r4d, [lutq + %3q*4 + 12]
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movhps %2, [inq + r4q*8]
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vinsertf128 %1, %1, %2, 1
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%endif
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%endmacro
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%macro POSTROTATE_FN 1
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cglobal mdct15_postreindex, 5, 7, 8 + cpuflag(avx2)*2, out, in, exp, lut, len8, offset_p, offset_n
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xor offset_nq, offset_nq
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lea offset_pq, [len8q*2 - %1]
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movaps m7, [sign_adjust_r]
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%if cpuflag(avx2)
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movaps m8, [perm_pos]
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movaps m9, [perm_neg]
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%endif
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.loop:
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movups m0, [expq + offset_pq*8] ; exp[p0].re, exp[p0].im, exp[p1].re, exp[p1].im, exp[p2].re, exp[p2].im, exp[p3].re, exp[p3].im
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movups m1, [expq + offset_nq*8] ; exp[n3].re, exp[n3].im, exp[n2].re, exp[n2].im, exp[n1].re, exp[n1].im, exp[n0].re, exp[n0].im
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LUT_LOAD_4D m3, xm4, offset_p ; in[p0].re, in[p0].im, in[p1].re, in[p1].im, in[p2].re, in[p2].im, in[p3].re, in[p3].im
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LUT_LOAD_4D m4, xm5, offset_n ; in[n3].re, in[n3].im, in[n2].re, in[n2].im, in[n1].re, in[n1].im, in[n0].re, in[n0].im
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mulps m5, m3, m0 ; in[p].reim * exp[p].reim
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mulps m6, m4, m1 ; in[n].reim * exp[n].reim
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xorps m5, m7 ; in[p].re *= -1, in[p].im *= 1
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xorps m6, m7 ; in[n].re *= -1, in[n].im *= 1
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shufps m3, m3, m3, q2301 ; in[p].imre
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shufps m4, m4, m4, q2301 ; in[n].imre
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mulps m3, m0 ; in[p].imre * exp[p].reim
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mulps m4, m1 ; in[n].imre * exp[n].reim
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haddps m3, m6 ; out[n0].im, out[n1].im, out[n3].re, out[n2].re, out[n2].im, out[n3].im, out[n1].re, out[n0].re
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haddps m5, m4 ; out[p0].re, out[p1].re, out[p3].im, out[p2].im, out[p2].re, out[p3].re, out[p1].im, out[p0].im
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%if cpuflag(avx2)
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vpermps m3, m9, m3 ; out[n3].im, out[n3].re, out[n2].im, out[n2].re, out[n1].im, out[n1].re, out[n0].im, out[n0].re
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vpermps m5, m8, m5 ; out[p0].re, out[p0].im, out[p1].re, out[p1].im, out[p2].re, out[p2].im, out[p3].re, out[p3].im
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%else
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shufps m3, m3, m3, q0312
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shufps m5, m5, m5, q2130
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%endif
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movups [outq + offset_nq*8], m3
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movups [outq + offset_pq*8], m5
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sub offset_pq, %1
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add offset_nq, %1
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cmp offset_nq, offset_pq
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jle .loop
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REP_RET
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%endmacro
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INIT_XMM sse3
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POSTROTATE_FN 2
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%if ARCH_X86_64 && HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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POSTROTATE_FN 4
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%endif
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