mirror of
https://github.com/FFmpeg/FFmpeg.git
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8be0e2bd43
* commit '6369ba3c9cc74becfaad2a8882dff3dd3e7ae3c0': x86: avcodec: Use convenience macros to check for CPU flags Conflicts: libavcodec/x86/dsputil_init.c libavcodec/x86/hpeldsp_init.c libavcodec/x86/motion_est.c Merged-by: Michael Niedermayer <michaelni@gmx.at>
475 lines
16 KiB
C
475 lines
16 KiB
C
/*
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* MMX optimized motion estimation
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* Copyright (c) 2001 Fabrice Bellard
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* Copyright (c) 2002-2004 Michael Niedermayer
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*
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* mostly by Michael Niedermayer <michaelni@gmx.at>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/attributes.h"
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#include "libavutil/avassert.h"
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#include "libavutil/mem.h"
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#include "libavutil/x86/asm.h"
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#include "libavutil/x86/cpu.h"
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#include "dsputil_x86.h"
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#if HAVE_INLINE_ASM
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DECLARE_ASM_CONST(8, uint64_t, round_tab)[3]={
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0x0000000000000000ULL,
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0x0001000100010001ULL,
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0x0002000200020002ULL,
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};
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DECLARE_ASM_CONST(8, uint64_t, bone)= 0x0101010101010101LL;
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static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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x86_reg len= -(x86_reg)stride*h;
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__asm__ volatile(
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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"movq (%2, %%"REG_a"), %%mm2 \n\t"
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"movq (%2, %%"REG_a"), %%mm4 \n\t"
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"add %3, %%"REG_a" \n\t"
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"psubusb %%mm0, %%mm2 \n\t"
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"psubusb %%mm4, %%mm0 \n\t"
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"movq (%1, %%"REG_a"), %%mm1 \n\t"
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"movq (%2, %%"REG_a"), %%mm3 \n\t"
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"movq (%2, %%"REG_a"), %%mm5 \n\t"
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"psubusb %%mm1, %%mm3 \n\t"
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"psubusb %%mm5, %%mm1 \n\t"
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"por %%mm2, %%mm0 \n\t"
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"por %%mm1, %%mm3 \n\t"
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"movq %%mm0, %%mm1 \n\t"
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"movq %%mm3, %%mm2 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"punpckhbw %%mm7, %%mm1 \n\t"
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"punpcklbw %%mm7, %%mm3 \n\t"
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"punpckhbw %%mm7, %%mm2 \n\t"
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"paddw %%mm1, %%mm0 \n\t"
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"paddw %%mm3, %%mm2 \n\t"
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"paddw %%mm2, %%mm0 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"add %3, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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}
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static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm0 \n\t"
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"movq (%1, %3), %%mm1 \n\t"
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"psadbw (%2), %%mm0 \n\t"
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"psadbw (%2, %3), %%mm1 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm1, %%mm6 \n\t"
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"lea (%1,%3,2), %1 \n\t"
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"lea (%2,%3,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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}
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static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)
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{
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int ret;
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__asm__ volatile(
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"pxor %%xmm2, %%xmm2 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movdqu (%1), %%xmm0 \n\t"
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"movdqu (%1, %4), %%xmm1 \n\t"
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"psadbw (%2), %%xmm0 \n\t"
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"psadbw (%2, %4), %%xmm1 \n\t"
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"paddw %%xmm0, %%xmm2 \n\t"
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"paddw %%xmm1, %%xmm2 \n\t"
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"lea (%1,%4,2), %1 \n\t"
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"lea (%2,%4,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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"movhlps %%xmm2, %%xmm0 \n\t"
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"paddw %%xmm0, %%xmm2 \n\t"
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"movd %%xmm2, %3 \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2), "=r"(ret)
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: "r" ((x86_reg)stride)
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);
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return ret;
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}
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static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm0 \n\t"
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"movq (%1, %3), %%mm1 \n\t"
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"pavgb 1(%1), %%mm0 \n\t"
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"pavgb 1(%1, %3), %%mm1 \n\t"
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"psadbw (%2), %%mm0 \n\t"
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"psadbw (%2, %3), %%mm1 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm1, %%mm6 \n\t"
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"lea (%1,%3,2), %1 \n\t"
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"lea (%2,%3,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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}
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static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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"movq (%1), %%mm0 \n\t"
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"add %3, %1 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm1 \n\t"
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"movq (%1, %3), %%mm2 \n\t"
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"pavgb %%mm1, %%mm0 \n\t"
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"pavgb %%mm2, %%mm1 \n\t"
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"psadbw (%2), %%mm0 \n\t"
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"psadbw (%2, %3), %%mm1 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm1, %%mm6 \n\t"
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"movq %%mm2, %%mm0 \n\t"
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"lea (%1,%3,2), %1 \n\t"
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"lea (%2,%3,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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}
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static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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"movq "MANGLE(bone)", %%mm5 \n\t"
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"movq (%1), %%mm0 \n\t"
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"pavgb 1(%1), %%mm0 \n\t"
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"add %3, %1 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm1 \n\t"
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"movq (%1,%3), %%mm2 \n\t"
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"pavgb 1(%1), %%mm1 \n\t"
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"pavgb 1(%1,%3), %%mm2 \n\t"
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"psubusb %%mm5, %%mm1 \n\t"
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"pavgb %%mm1, %%mm0 \n\t"
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"pavgb %%mm2, %%mm1 \n\t"
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"psadbw (%2), %%mm0 \n\t"
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"psadbw (%2,%3), %%mm1 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm1, %%mm6 \n\t"
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"movq %%mm2, %%mm0 \n\t"
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"lea (%1,%3,2), %1 \n\t"
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"lea (%2,%3,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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}
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static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2, int stride, int h)
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{
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x86_reg len= -(x86_reg)stride*h;
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__asm__ volatile(
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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"movq (%2, %%"REG_a"), %%mm1 \n\t"
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"movq (%1, %%"REG_a"), %%mm2 \n\t"
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"movq (%2, %%"REG_a"), %%mm3 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"punpcklbw %%mm7, %%mm1 \n\t"
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"punpckhbw %%mm7, %%mm2 \n\t"
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"punpckhbw %%mm7, %%mm3 \n\t"
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"paddw %%mm0, %%mm1 \n\t"
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"paddw %%mm2, %%mm3 \n\t"
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"movq (%3, %%"REG_a"), %%mm4 \n\t"
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"movq (%3, %%"REG_a"), %%mm2 \n\t"
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"paddw %%mm5, %%mm1 \n\t"
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"paddw %%mm5, %%mm3 \n\t"
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"psrlw $1, %%mm1 \n\t"
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"psrlw $1, %%mm3 \n\t"
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"packuswb %%mm3, %%mm1 \n\t"
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"psubusb %%mm1, %%mm4 \n\t"
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"psubusb %%mm2, %%mm1 \n\t"
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"por %%mm4, %%mm1 \n\t"
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"movq %%mm1, %%mm0 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"punpckhbw %%mm7, %%mm1 \n\t"
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"paddw %%mm1, %%mm0 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"add %4, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1a - len), "r" (blk1b -len), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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}
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static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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x86_reg len= -(x86_reg)stride*h;
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__asm__ volatile(
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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"movq 1(%1, %%"REG_a"), %%mm2 \n\t"
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"movq %%mm0, %%mm1 \n\t"
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"movq %%mm2, %%mm3 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"punpckhbw %%mm7, %%mm1 \n\t"
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"punpcklbw %%mm7, %%mm2 \n\t"
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"punpckhbw %%mm7, %%mm3 \n\t"
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"paddw %%mm2, %%mm0 \n\t"
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"paddw %%mm3, %%mm1 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%2, %%"REG_a"), %%mm2 \n\t"
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"movq 1(%2, %%"REG_a"), %%mm4 \n\t"
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"movq %%mm2, %%mm3 \n\t"
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"movq %%mm4, %%mm5 \n\t"
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"punpcklbw %%mm7, %%mm2 \n\t"
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"punpckhbw %%mm7, %%mm3 \n\t"
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"punpcklbw %%mm7, %%mm4 \n\t"
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"punpckhbw %%mm7, %%mm5 \n\t"
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"paddw %%mm4, %%mm2 \n\t"
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"paddw %%mm5, %%mm3 \n\t"
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"movq 16+"MANGLE(round_tab)", %%mm5 \n\t"
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"paddw %%mm2, %%mm0 \n\t"
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"paddw %%mm3, %%mm1 \n\t"
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"paddw %%mm5, %%mm0 \n\t"
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"paddw %%mm5, %%mm1 \n\t"
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"movq (%3, %%"REG_a"), %%mm4 \n\t"
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"movq (%3, %%"REG_a"), %%mm5 \n\t"
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"psrlw $2, %%mm0 \n\t"
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"psrlw $2, %%mm1 \n\t"
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"packuswb %%mm1, %%mm0 \n\t"
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"psubusb %%mm0, %%mm4 \n\t"
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"psubusb %%mm5, %%mm0 \n\t"
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"por %%mm4, %%mm0 \n\t"
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"movq %%mm0, %%mm4 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"punpckhbw %%mm7, %%mm4 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm4, %%mm6 \n\t"
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"movq %%mm2, %%mm0 \n\t"
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"movq %%mm3, %%mm1 \n\t"
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"add %4, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1 - len), "r" (blk1 -len + stride), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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}
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static inline int sum_mmx(void)
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{
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int ret;
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__asm__ volatile(
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"movq %%mm6, %%mm0 \n\t"
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"psrlq $32, %%mm6 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"movq %%mm6, %%mm0 \n\t"
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"psrlq $16, %%mm6 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"movd %%mm6, %0 \n\t"
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: "=r" (ret)
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);
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return ret&0xFFFF;
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}
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static inline int sum_mmxext(void)
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{
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int ret;
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__asm__ volatile(
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"movd %%mm6, %0 \n\t"
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: "=r" (ret)
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);
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return ret;
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}
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static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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sad8_2_mmx(blk1, blk1+1, blk2, stride, h);
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}
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static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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sad8_2_mmx(blk1, blk1+stride, blk2, stride, h);
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}
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#define PIX_SAD(suf)\
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static int sad8_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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av_assert2(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t":);\
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\
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sad8_1_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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static int sad8_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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av_assert2(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_x2a_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad8_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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av_assert2(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_y2a_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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av_assert2(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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::);\
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\
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sad8_4_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad16_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t":);\
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\
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sad8_1_ ## suf(blk1 , blk2 , stride, h);\
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sad8_1_ ## suf(blk1+8, blk2+8, stride, h);\
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\
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return sum_ ## suf();\
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}\
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static int sad16_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
|
|
"pxor %%mm6, %%mm6 \n\t"\
|
|
"movq %0, %%mm5 \n\t"\
|
|
:: "m"(round_tab[1]) \
|
|
);\
|
|
\
|
|
sad8_x2a_ ## suf(blk1 , blk2 , stride, h);\
|
|
sad8_x2a_ ## suf(blk1+8, blk2+8, stride, h);\
|
|
\
|
|
return sum_ ## suf();\
|
|
}\
|
|
static int sad16_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
|
|
{\
|
|
__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
|
|
"pxor %%mm6, %%mm6 \n\t"\
|
|
"movq %0, %%mm5 \n\t"\
|
|
:: "m"(round_tab[1]) \
|
|
);\
|
|
\
|
|
sad8_y2a_ ## suf(blk1 , blk2 , stride, h);\
|
|
sad8_y2a_ ## suf(blk1+8, blk2+8, stride, h);\
|
|
\
|
|
return sum_ ## suf();\
|
|
}\
|
|
static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
|
|
{\
|
|
__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
|
|
"pxor %%mm6, %%mm6 \n\t"\
|
|
::);\
|
|
\
|
|
sad8_4_ ## suf(blk1 , blk2 , stride, h);\
|
|
sad8_4_ ## suf(blk1+8, blk2+8, stride, h);\
|
|
\
|
|
return sum_ ## suf();\
|
|
}\
|
|
|
|
PIX_SAD(mmx)
|
|
PIX_SAD(mmxext)
|
|
|
|
#endif /* HAVE_INLINE_ASM */
|
|
|
|
av_cold void ff_dsputil_init_pix_mmx(DSPContext *c, AVCodecContext *avctx)
|
|
{
|
|
#if HAVE_INLINE_ASM
|
|
int cpu_flags = av_get_cpu_flags();
|
|
|
|
if (INLINE_MMX(cpu_flags)) {
|
|
c->pix_abs[0][0] = sad16_mmx;
|
|
c->pix_abs[0][1] = sad16_x2_mmx;
|
|
c->pix_abs[0][2] = sad16_y2_mmx;
|
|
c->pix_abs[0][3] = sad16_xy2_mmx;
|
|
c->pix_abs[1][0] = sad8_mmx;
|
|
c->pix_abs[1][1] = sad8_x2_mmx;
|
|
c->pix_abs[1][2] = sad8_y2_mmx;
|
|
c->pix_abs[1][3] = sad8_xy2_mmx;
|
|
|
|
c->sad[0]= sad16_mmx;
|
|
c->sad[1]= sad8_mmx;
|
|
}
|
|
if (INLINE_MMXEXT(cpu_flags)) {
|
|
c->pix_abs[0][0] = sad16_mmxext;
|
|
c->pix_abs[1][0] = sad8_mmxext;
|
|
|
|
c->sad[0] = sad16_mmxext;
|
|
c->sad[1] = sad8_mmxext;
|
|
|
|
if(!(avctx->flags & CODEC_FLAG_BITEXACT)){
|
|
c->pix_abs[0][1] = sad16_x2_mmxext;
|
|
c->pix_abs[0][2] = sad16_y2_mmxext;
|
|
c->pix_abs[0][3] = sad16_xy2_mmxext;
|
|
c->pix_abs[1][1] = sad8_x2_mmxext;
|
|
c->pix_abs[1][2] = sad8_y2_mmxext;
|
|
c->pix_abs[1][3] = sad8_xy2_mmxext;
|
|
}
|
|
}
|
|
if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_3DNOW) && avctx->codec_id != AV_CODEC_ID_SNOW) {
|
|
c->sad[0]= sad16_sse2;
|
|
}
|
|
#endif /* HAVE_INLINE_ASM */
|
|
}
|