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454c019cb5
Fixes compilation with NASM x86_64 Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
181 lines
5.6 KiB
NASM
181 lines
5.6 KiB
NASM
; /*
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; * Provide SSE & MMX idct functions for HEVC decoding
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; * Copyright (c) 2014 Pierre-Edouard LEPERE
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; *
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; * This file is part of FFmpeg.
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; *
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; * FFmpeg is free software; you can redistribute it and/or
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; * modify it under the terms of the GNU Lesser General Public
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; * License as published by the Free Software Foundation; either
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; * version 2.1 of the License, or (at your option) any later version.
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; *
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; * FFmpeg is distributed in the hope that it will be useful,
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; * but WITHOUT ANY WARRANTY; without even the implied warranty of
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; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; * Lesser General Public License for more details.
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; *
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; * You should have received a copy of the GNU Lesser General Public
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; * License along with FFmpeg; if not, write to the Free Software
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; * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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; */
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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max_pixels_10: times 8 dw ((1 << 10)-1)
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dc_add_10: times 4 dd ((1 << 14-10) + 1)
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SECTION .text
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;the idct_dc_add macros and functions were largely inspired by x264 project's code in the h264_idct.asm file
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%macro DC_ADD_INIT 2
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add %1w, ((1 << 14-8) + 1)
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sar %1w, (15-8)
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movd m0, %1d
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lea %1, [%2*3]
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SPLATW m0, m0, 0
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pxor m1, m1
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psubw m1, m0
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packuswb m0, m0
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packuswb m1, m1
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%endmacro
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%macro DC_ADD_OP 4
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%1 m2, [%2 ]
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%1 m3, [%2+%3 ]
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%1 m4, [%2+%3*2]
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%1 m5, [%2+%4 ]
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paddusb m2, m0
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paddusb m3, m0
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paddusb m4, m0
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paddusb m5, m0
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psubusb m2, m1
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psubusb m3, m1
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psubusb m4, m1
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psubusb m5, m1
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%1 [%2 ], m2
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%1 [%2+%3 ], m3
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%1 [%2+%3*2], m4
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%1 [%2+%4 ], m5
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%endmacro
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INIT_MMX mmxext
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; void ff_hevc_idct_dc_add_8_mmxext(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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%if ARCH_X86_64
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cglobal hevc_idct4_dc_add_8, 3, 4, 0
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movsx r3, word [r1]
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DC_ADD_INIT r3, r2
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DC_ADD_OP movh, r0, r2, r3
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RET
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; void ff_hevc_idct8_dc_add_8_mmxext(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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cglobal hevc_idct8_dc_add_8, 3, 4, 0
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movsx r3, word [r1]
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DC_ADD_INIT r3, r2
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DC_ADD_OP mova, r0, r2, r3
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lea r0, [r0+r2*4]
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DC_ADD_OP mova, r0, r2, r3
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RET
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%else
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; void ff_hevc_idct_dc_add_8_mmxext(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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cglobal hevc_idct4_dc_add_8, 2, 3, 0
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movsx r2, word [r1]
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mov r1, r2m
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DC_ADD_INIT r2, r1
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DC_ADD_OP movh, r0, r1, r2
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RET
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; void ff_hevc_idct8_dc_add_8_mmxext(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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cglobal hevc_idct8_dc_add_8, 2, 3, 0
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movsx r2, word [r1]
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mov r1, r2m
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DC_ADD_INIT r2, r1
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DC_ADD_OP mova, r0, r1, r2
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lea r0, [r0+r1*4]
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DC_ADD_OP mova, r0, r1, r2
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RET
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%endif
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INIT_XMM sse2
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; void ff_hevc_idct16_dc_add_8_mmxext(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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cglobal hevc_idct16_dc_add_8, 3, 4, 0
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movsx r3, word [r1]
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DC_ADD_INIT r3, r2
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DC_ADD_OP mova, r0, r2, r3
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lea r0, [r0+r2*4]
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DC_ADD_OP mova, r0, r2, r3
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lea r0, [r0+r2*4]
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DC_ADD_OP mova, r0, r2, r3
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lea r0, [r0+r2*4]
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DC_ADD_OP mova, r0, r2, r3
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RET
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;-----------------------------------------------------------------------------
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; void ff_hevc_idct_dc_add_10(pixel *dst, int16_t *block, int stride)
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;-----------------------------------------------------------------------------
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%macro IDCT_DC_ADD_OP_10 3
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pxor m5, m5
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%if avx_enabled
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paddw m1, m0, [%1+0 ]
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paddw m2, m0, [%1+%2 ]
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paddw m3, m0, [%1+%2*2]
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paddw m4, m0, [%1+%3 ]
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%else
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mova m1, [%1+0 ]
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mova m2, [%1+%2 ]
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mova m3, [%1+%2*2]
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mova m4, [%1+%3 ]
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paddw m1, m0
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paddw m2, m0
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paddw m3, m0
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paddw m4, m0
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%endif
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CLIPW m1, m5, m6
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CLIPW m2, m5, m6
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CLIPW m3, m5, m6
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CLIPW m4, m5, m6
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mova [%1+0 ], m1
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mova [%1+%2 ], m2
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mova [%1+%2*2], m3
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mova [%1+%3 ], m4
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%endmacro
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INIT_MMX mmxext
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cglobal hevc_idct4_dc_add_10,3,3
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mov r1w, [r1]
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add r1w, ((1 << 4) + 1)
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sar r1w, 5
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movd m0, r1d
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lea r1, [r2*3]
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SPLATW m0, m0, 0
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mova m6, [max_pixels_10]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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RET
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;-----------------------------------------------------------------------------
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; void ff_hevc_idct8_dc_add_10(pixel *dst, int16_t *block, int stride)
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;-----------------------------------------------------------------------------
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%macro IDCT8_DC_ADD 0
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cglobal hevc_idct8_dc_add_10,3,4,7
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mov r1w, [r1]
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add r1w, ((1 << 4) + 1)
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sar r1w, 5
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movd m0, r1d
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lea r1, [r2*3]
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SPLATW m0, m0, 0
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mova m6, [max_pixels_10]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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lea r0, [r0+r2*4]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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RET
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%endmacro
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INIT_XMM sse2
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IDCT8_DC_ADD
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%if HAVE_AVX_EXTERNAL
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INIT_XMM avx
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IDCT8_DC_ADD
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%endif
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