mirror of
https://github.com/FFmpeg/FFmpeg.git
synced 2024-12-23 12:43:46 +02:00
304 lines
8.3 KiB
ArmAsm
304 lines
8.3 KiB
ArmAsm
/*
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* Copyright © 2023 Rémi Denis-Courmont.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/riscv/asm.S"
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func ff_sbr_sum64x5_rvv, zve32f, zba
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lpad 0
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li a5, 64
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addi a1, a0, 64 * 4
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addi a2, a0, 128 * 4
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addi a3, a0, 192 * 4
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addi a4, a0, 256 * 4
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1:
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vsetvli t0, a5, e32, m8, ta, ma
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sub a5, a5, t0
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vle32.v v0, (a0)
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vle32.v v8, (a1)
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sh2add a1, t0, a1
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vle32.v v16, (a2)
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vfadd.vv v0, v0, v8
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sh2add a2, t0, a2
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vle32.v v24, (a3)
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vfadd.vv v0, v0, v16
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sh2add a3, t0, a3
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vle32.v v8, (a4)
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vfadd.vv v0, v0, v24
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sh2add a4, t0, a4
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vfadd.vv v0, v0, v8
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vse32.v v0, (a0)
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sh2add a0, t0, a0
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bnez a5, 1b
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ret
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endfunc
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func ff_sbr_sum_square_rvv, zve32f, zba
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lpad 0
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vsetvli t0, zero, e32, m8, ta, ma
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slli a1, a1, 1
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vmv.v.x v8, zero
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vmv.s.x v0, zero
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1:
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vsetvli t0, a1, e32, m8, tu, ma
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vle32.v v16, (a0)
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sub a1, a1, t0
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vfmacc.vv v8, v16, v16
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sh2add a0, t0, a0
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bnez a1, 1b
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vfredusum.vs v0, v8, v0
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vfmv.f.s fa0, v0
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NOHWF fmv.x.w a0, fa0
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ret
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endfunc
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func ff_sbr_autocorrelate_rvv, zve32f
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lpad 0
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vsetvli t0, zero, e32, m4, ta, ma
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vmv.v.x v0, zero
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flw fa0, (a0)
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vmv.v.x v4, zero
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flw fa1, 4(a0)
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vmv.v.x v8, zero
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flw fa2, 8(a0)
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li a2, 37
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flw fa3, 12(a0)
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fmul.s ft10, fa0, fa0
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flw fa4, 16(a0)
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fmul.s ft6, fa0, fa2
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flw fa5, 20(a0)
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addi a0, a0, 38 * 8
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fmul.s ft7, fa0, fa3
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fmul.s ft2, fa0, fa4
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fmul.s ft3, fa0, fa5
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flw fa0, (a0)
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fmadd.s ft10, fa1, fa1, ft10
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fmadd.s ft6, fa1, fa3, ft6
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flw fa3, 12(a0)
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fnmsub.s ft7, fa1, fa2, ft7
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flw fa2, 8(a0)
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fmadd.s ft2, fa1, fa5, ft2
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fnmsub.s ft3, fa1, fa4, ft3
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flw fa1, 4(a0)
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fmul.s ft4, fa0, fa0
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fmul.s ft0, fa0, fa2
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fmul.s ft1, fa0, fa3
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fmadd.s ft4, fa1, fa1, ft4
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fmadd.s ft0, fa1, fa3, ft0
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fnmsub.s ft1, fa1, fa2, ft1
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1:
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vsetvli t0, a2, e32, m2, tu, ma
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slli t1, t0, 3
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sub a0, a0, t1
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vlseg2e32.v v16, (a0)
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sub a2, a2, t0
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vfmacc.vv v0, v16, v16
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vfslide1down.vf v20, v16, fa0
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vfmacc.vv v4, v16, v20
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vfslide1down.vf v22, v18, fa1
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vfmacc.vv v0, v18, v18
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vfslide1down.vf v24, v20, fa2
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vfmacc.vv v4, v18, v22
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vfslide1down.vf v26, v22, fa3
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vfmacc.vv v6, v16, v22
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vfmv.f.s fa0, v16
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vfmacc.vv v8, v16, v24
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vfmv.f.s fa1, v18
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vfmacc.vv v10, v16, v26
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vfmv.f.s fa2, v20
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vfnmsac.vv v6, v18, v20
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vfmv.f.s fa3, v22
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vfmacc.vv v8, v18, v26
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vfnmsac.vv v10, v18, v24
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bnez a2, 1b
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vsetvli t0, zero, e32, m2, ta, ma
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vfredusum.vs v0, v0, v2
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vfredusum.vs v4, v4, v2
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vfmv.f.s fa0, v0
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vfredusum.vs v6, v6, v2
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vfmv.f.s fa2, v4
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fadd.s ft4, ft4, fa0
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vfredusum.vs v8, v8, v2
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vfmv.f.s fa3, v6
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fadd.s ft0, ft0, fa2
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vfredusum.vs v10, v10, v2
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vfmv.f.s fa4, v8
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fadd.s ft1, ft1, fa3
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vfmv.f.s fa5, v10
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fsw ft0, (a1)
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fadd.s ft2, ft2, fa4
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fsw ft1, 4(a1)
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fadd.s ft3, ft3, fa5
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fsw ft2, 8(a1)
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fadd.s ft6, ft6, fa2
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fsw ft3, 12(a1)
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fadd.s ft7, ft7, fa3
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fsw ft4, 16(a1)
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fadd.s ft10, ft10, fa0
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fsw ft6, 24(a1)
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fsw ft7, 28(a1)
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fsw ft10, 40(a1)
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ret
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endfunc
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func ff_sbr_hf_gen_rvv, zve32f, zba
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lpad 0
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NOHWF fmv.w.x fa0, a4
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NOHWF mv a4, a5
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NOHWF mv a5, a6
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flw ft2, 0(a2)
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fmul.s fa1, fa0, fa0 // bw * bw
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sh3add a1, a5, a1
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flw ft3, 4(a2)
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fmul.s fa2, ft2, fa0 // alpha[2]
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sh3add a0, a5, a0
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flw ft0, 0(a3)
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fmul.s fa3, ft3, fa0 // alpha[3]
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sub a5, a5, a4
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flw ft1, 4(a3)
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fmul.s fa0, ft0, fa1 // alpha[0]
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flw ft0, -16(a1) // X_low[end - 2][0]
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fmul.s fa1, ft1, fa1 // alpha[1]
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flw ft1, -12(a1) // X_low[end - 2][1]
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flw ft2, -8(a1) // X_low[end - 1][0]
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flw ft3, -4(a1) // X_low[end - 1][1]
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addi a1, a1, -16
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1:
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vsetvli t0, a5, e32, m4, ta, ma
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slli t1, t0, 3
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sub a1, a1, t1
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vlseg2e32.v v0, (a1) // X_low[i - 2]
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sub a0, a0, t1
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vfslide1down.vf v8, v0, ft0 // X_low[i - 1][0]
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sub a5, a5, t0
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vfslide1down.vf v12, v4, ft1 // X_low[i - 1][1]
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vfslide1down.vf v16, v8, ft2 // X_low[i ][0]
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vfslide1down.vf v20, v12, ft3 // X_low[i ][1]
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vfmacc.vf v16, fa0, v0
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vfmacc.vf v20, fa0, v4
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vfmv.f.s ft0, v0
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vfnmsac.vf v16, fa1, v4
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vfmacc.vf v20, fa1, v0
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vfmv.f.s ft1, v4
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vfmacc.vf v16, fa2, v8
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vfmacc.vf v20, fa2, v12
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vfmv.f.s ft2, v8
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vfnmsac.vf v16, fa3, v12
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vfmacc.vf v20, fa3, v8
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vfmv.f.s ft3, v12
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vsseg2e32.v v16, (a0)
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bnez a5, 1b
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ret
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endfunc
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func ff_sbr_hf_g_filt_rvv, zve32f, zba
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lpad 0
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li t1, 40 * 2 * 4
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sh3add a1, a4, a1
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1:
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vsetvli t0, a3, e32, m4, ta, ma
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vlsseg2e32.v v16, (a1), t1
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mul t2, t0, t1
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vle32.v v8, (a2)
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sub a3, a3, t0
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vfmul.vv v16, v16, v8
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add a1, t2, a1
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vfmul.vv v20, v20, v8
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sh2add a2, t0, a2
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vsseg2e32.v v16, (a0)
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sh3add a0, t0, a0
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bnez a3, 1b
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ret
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endfunc
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.macro hf_apply_noise n
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lla a6, ff_sbr_noise_table + 8
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fmv.s.x ft0, zero
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1:
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.if \n & 1
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min t0, t0, a5 // preserve parity of t0 for v4 sign injector
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vsetvli zero, t0, e32, m4, ta, mu
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.else
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vsetvli t0, a5, e32, m4, ta, mu
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.endif
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sh3add t6, a3, a6
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vle32.v v8, (a1) // s_m
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sub a5, a5, t0
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vle32.v v12, (a2) // q_filt
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sh2add a1, t0, a1
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vmfeq.vf v0, v8, ft0 // s_m == 0.f
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vlseg2e32.v v24, (t6) // ff_sbr_noise_table
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sh2add a2, t0, a2
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.if \n == 2
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vfneg.v v8, v8
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.endif
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.if \n & 1
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vfsgnjx.vv v8, v8, v4 // could equivalent use vxor.vv
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.endif
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add a3, t0, a3
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vlseg2e32.v v16, (a0) // Y
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andi a3, a3, 0x1ff
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.if \n & 1
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vfmul.vv v28, v12, v28
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vfmacc.vv v16, v12, v24, v0.t
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vmerge.vvm v28, v8, v28, v0
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vfadd.vv v20, v20, v28
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.else
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vfmul.vv v24, v12, v24
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vfmacc.vv v20, v12, v28, v0.t
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vmerge.vvm v24, v8, v24, v0
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vfadd.vv v16, v16, v24
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.endif
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vsseg2e32.v v16, (a0)
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sh3add a0, t0, a0
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bnez a5, 1b
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ret
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.endm
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func ff_sbr_hf_apply_noise_0_rvv, zve32f, b
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lpad 0
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hf_apply_noise 0
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endfunc
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func ff_sbr_hf_apply_noise_3_rvv, zve32f, b
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lpad 0
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not a4, a4 // invert parity of kx
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// fall through
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endfunc
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func ff_sbr_hf_apply_noise_1_rvv, zve32f, b
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lpad 0
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vsetvli t0, zero, e32, m4, ta, ma
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vid.v v4
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vxor.vx v4, v4, a4
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vsll.vi v4, v4, 31 // v4[i] = (kx & 1) ? -0.f : +0.f
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hf_apply_noise 1
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endfunc
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func ff_sbr_hf_apply_noise_2_rvv, zve32f, b
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lpad 0
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hf_apply_noise 2
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endfunc
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