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https://github.com/FFmpeg/FFmpeg.git
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37d5ddc317
Unfortunately, it is common, and will remain so, that the Bit manipulations are not enabled at compilation time. This is an official policy for Debian ports in general (though they do not support RISC-V officially as of yet) to stick to the minimal target baseline, which does not include the B extension or even its Zbb subset. For inline helpers (CPOP, REV8), compiler builtins (CTZ, CLZ) or even plain C code (MIN, MAX, MINU, MAXU), run-time detection seems impractical. But at least it can work for the byte-swap DSP functions.
135 lines
6.0 KiB
C
135 lines
6.0 KiB
C
/*
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* Copyright (c) 2000, 2001, 2002 Fabrice Bellard
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVUTIL_CPU_H
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#define AVUTIL_CPU_H
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#include <stddef.h>
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#define AV_CPU_FLAG_FORCE 0x80000000 /* force usage of selected flags (OR) */
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/* lower 16 bits - CPU features */
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#define AV_CPU_FLAG_MMX 0x0001 ///< standard MMX
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#define AV_CPU_FLAG_MMXEXT 0x0002 ///< SSE integer functions or AMD MMX ext
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#define AV_CPU_FLAG_MMX2 0x0002 ///< SSE integer functions or AMD MMX ext
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#define AV_CPU_FLAG_3DNOW 0x0004 ///< AMD 3DNOW
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#define AV_CPU_FLAG_SSE 0x0008 ///< SSE functions
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#define AV_CPU_FLAG_SSE2 0x0010 ///< PIV SSE2 functions
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#define AV_CPU_FLAG_SSE2SLOW 0x40000000 ///< SSE2 supported, but usually not faster
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///< than regular MMX/SSE (e.g. Core1)
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#define AV_CPU_FLAG_3DNOWEXT 0x0020 ///< AMD 3DNowExt
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#define AV_CPU_FLAG_SSE3 0x0040 ///< Prescott SSE3 functions
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#define AV_CPU_FLAG_SSE3SLOW 0x20000000 ///< SSE3 supported, but usually not faster
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///< than regular MMX/SSE (e.g. Core1)
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#define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions
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#define AV_CPU_FLAG_SSSE3SLOW 0x4000000 ///< SSSE3 supported, but usually not faster
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#define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3 instructions are slower
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#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
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#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
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#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard functions
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#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
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#define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when using YMM registers (e.g. Bulldozer)
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#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
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#define AV_CPU_FLAG_FMA4 0x0800 ///< Bulldozer FMA4 functions
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#define AV_CPU_FLAG_CMOV 0x1000 ///< supports cmov instruction
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#define AV_CPU_FLAG_AVX2 0x8000 ///< AVX2 functions: requires OS support even if YMM registers aren't used
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#define AV_CPU_FLAG_FMA3 0x10000 ///< Haswell FMA3 functions
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#define AV_CPU_FLAG_BMI1 0x20000 ///< Bit Manipulation Instruction Set 1
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#define AV_CPU_FLAG_BMI2 0x40000 ///< Bit Manipulation Instruction Set 2
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#define AV_CPU_FLAG_AVX512 0x100000 ///< AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used
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#define AV_CPU_FLAG_AVX512ICL 0x200000 ///< F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ
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#define AV_CPU_FLAG_SLOW_GATHER 0x2000000 ///< CPU has slow gathers.
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#define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
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#define AV_CPU_FLAG_VSX 0x0002 ///< ISA 2.06
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#define AV_CPU_FLAG_POWER8 0x0004 ///< ISA 2.07
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#define AV_CPU_FLAG_ARMV5TE (1 << 0)
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#define AV_CPU_FLAG_ARMV6 (1 << 1)
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#define AV_CPU_FLAG_ARMV6T2 (1 << 2)
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#define AV_CPU_FLAG_VFP (1 << 3)
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#define AV_CPU_FLAG_VFPV3 (1 << 4)
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#define AV_CPU_FLAG_NEON (1 << 5)
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#define AV_CPU_FLAG_ARMV8 (1 << 6)
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#define AV_CPU_FLAG_VFP_VM (1 << 7) ///< VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations
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#define AV_CPU_FLAG_SETEND (1 <<16)
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#define AV_CPU_FLAG_MMI (1 << 0)
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#define AV_CPU_FLAG_MSA (1 << 1)
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//Loongarch SIMD extension.
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#define AV_CPU_FLAG_LSX (1 << 0)
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#define AV_CPU_FLAG_LASX (1 << 1)
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// RISC-V extensions
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#define AV_CPU_FLAG_RVI (1 << 0) ///< I (full GPR bank)
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#define AV_CPU_FLAG_RVF (1 << 1) ///< F (single precision FP)
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#define AV_CPU_FLAG_RVD (1 << 2) ///< D (double precision FP)
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#define AV_CPU_FLAG_RVV_I32 (1 << 3) ///< Vectors of 8/16/32-bit int's */
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#define AV_CPU_FLAG_RVV_F32 (1 << 4) ///< Vectors of float's */
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#define AV_CPU_FLAG_RVV_I64 (1 << 5) ///< Vectors of 64-bit int's */
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#define AV_CPU_FLAG_RVV_F64 (1 << 6) ///< Vectors of double's
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#define AV_CPU_FLAG_RVB_BASIC (1 << 7) ///< Basic bit-manipulations
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/**
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* Return the flags which specify extensions supported by the CPU.
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* The returned value is affected by av_force_cpu_flags() if that was used
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* before. So av_get_cpu_flags() can easily be used in an application to
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* detect the enabled cpu flags.
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*/
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int av_get_cpu_flags(void);
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/**
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* Disables cpu detection and forces the specified flags.
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* -1 is a special case that disables forcing of specific flags.
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*/
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void av_force_cpu_flags(int flags);
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/**
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* Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
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*
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* @return negative on error.
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*/
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int av_parse_cpu_caps(unsigned *flags, const char *s);
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/**
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* @return the number of logical CPU cores present.
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*/
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int av_cpu_count(void);
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/**
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* Overrides cpu count detection and forces the specified count.
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* Count < 1 disables forcing of specific count.
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*/
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void av_cpu_force_count(int count);
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/**
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* Get the maximum data alignment that may be required by FFmpeg.
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*
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* Note that this is affected by the build configuration and the CPU flags mask,
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* so e.g. if the CPU supports AVX, but libavutil has been built with
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* --disable-avx or the AV_CPU_FLAG_AVX flag has been disabled through
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* av_set_cpu_flags_mask(), then this function will behave as if AVX is not
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* present.
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*/
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size_t av_cpu_max_align(void);
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#endif /* AVUTIL_CPU_H */
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