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f2fd167835
The problem is that the ssse3 psign instruction does the wrong thing here. Commitea60dfe
incorrectly removed a macro emulating this instruction for pre-ssse3 code. However, the emulation is incorrect, and the code relies on the behaviour of the macro. Specifically, the psign sets destination elements to zero where the corresponding source element is zero, whereas the emulation only negates destination elements where the source is negative. Furthermore, the PSIGNW_MMX macro in x86util.asm is totally bogus, which is why the original VC-1 code had an additional right shift when using it. Since the psign instruction cannot be used here, skip all the macro hell and use the working instruction sequence directly. None of this was noticed due a stray return statement in ff_vc1dsp_init_mmx() which meant that only the mmx version of the loop filter was ever used (before being removed inea60dfe
). Signed-off-by: Mans Rullgard <mans@mansr.com>
321 lines
7.6 KiB
NASM
321 lines
7.6 KiB
NASM
;******************************************************************************
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;* VC1 deblocking optimizations
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;* Copyright (c) 2009 David Conrad
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with Libav; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "x86inc.asm"
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%include "x86util.asm"
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cextern pw_4
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cextern pw_5
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section .text
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; dst_low, dst_high (src), zero
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; zero-extends one vector from 8 to 16 bits
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%macro UNPACK_8TO16 4
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mova m%2, m%3
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punpckh%1 m%3, m%4
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punpckl%1 m%2, m%4
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%endmacro
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%macro STORE_4_WORDS_MMX 6
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movd %6d, %5
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%if mmsize==16
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psrldq %5, 4
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%else
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psrlq %5, 32
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%endif
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mov %1, %6w
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shr %6, 16
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mov %2, %6w
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movd %6d, %5
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mov %3, %6w
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shr %6, 16
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mov %4, %6w
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%endmacro
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%macro STORE_4_WORDS_SSE4 6
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pextrw %1, %5, %6+0
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pextrw %2, %5, %6+1
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pextrw %3, %5, %6+2
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pextrw %4, %5, %6+3
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%endmacro
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; in: p1 p0 q0 q1, clobbers p0
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; out: p1 = (2*(p1 - q1) - 5*(p0 - q0) + 4) >> 3
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%macro VC1_LOOP_FILTER_A0 4
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psubw %1, %4
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psubw %2, %3
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paddw %1, %1
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pmullw %2, [pw_5]
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psubw %1, %2
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paddw %1, [pw_4]
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psraw %1, 3
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%endmacro
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; in: p0 q0 a0 a1 a2
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; m0 m1 m7 m6 m5
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; %1: size
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; out: m0=p0' m1=q0'
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%macro VC1_FILTER 1
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PABSW m4, m7
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PABSW m3, m6
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PABSW m2, m5
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mova m6, m4
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pminsw m3, m2
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pcmpgtw m6, m3 ; if (a2 < a0 || a1 < a0)
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psubw m3, m4
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pmullw m3, [pw_5] ; 5*(a3 - a0)
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PABSW m2, m3
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psraw m2, 3 ; abs(d/8)
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pxor m7, m3 ; d_sign ^= a0_sign
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pxor m5, m5
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movd m3, r2d
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%if %1 > 4
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punpcklbw m3, m3
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%endif
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punpcklbw m3, m5
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pcmpgtw m3, m4 ; if (a0 < pq)
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pand m6, m3
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mova m3, m0
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psubw m3, m1
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PABSW m4, m3
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psraw m4, 1
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pxor m3, m7 ; d_sign ^ clip_sign
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psraw m3, 15
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pminsw m2, m4 ; min(d, clip)
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pcmpgtw m4, m5
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pand m6, m4 ; filt3 (C return value)
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; each set of 4 pixels is not filtered if the 3rd is not
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%if mmsize==16
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pshuflw m4, m6, 0xaa
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%if %1 > 4
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pshufhw m4, m4, 0xaa
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%endif
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%else
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pshufw m4, m6, 0xaa
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%endif
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pandn m3, m4
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pand m2, m6
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pand m3, m2 ; d final
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psraw m7, 15
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pxor m3, m7
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psubw m3, m7
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psubw m0, m3
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paddw m1, m3
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packuswb m0, m0
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packuswb m1, m1
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%endmacro
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; 1st param: size of filter
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; 2nd param: mov suffix equivalent to the filter size
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%macro VC1_V_LOOP_FILTER 2
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pxor m5, m5
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mov%2 m6, [r4]
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mov%2 m4, [r4+r1]
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mov%2 m7, [r4+2*r1]
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mov%2 m0, [r4+r3]
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punpcklbw m6, m5
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punpcklbw m4, m5
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punpcklbw m7, m5
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punpcklbw m0, m5
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VC1_LOOP_FILTER_A0 m6, m4, m7, m0
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mov%2 m1, [r0]
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mov%2 m2, [r0+r1]
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punpcklbw m1, m5
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punpcklbw m2, m5
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mova m4, m0
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VC1_LOOP_FILTER_A0 m7, m4, m1, m2
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mov%2 m3, [r0+2*r1]
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mov%2 m4, [r0+r3]
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punpcklbw m3, m5
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punpcklbw m4, m5
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mova m5, m1
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VC1_LOOP_FILTER_A0 m5, m2, m3, m4
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VC1_FILTER %1
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mov%2 [r4+r3], m0
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mov%2 [r0], m1
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%endmacro
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; 1st param: size of filter
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; NOTE: UNPACK_8TO16 this number of 8 bit numbers are in half a register
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; 2nd (optional) param: temp register to use for storing words
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%macro VC1_H_LOOP_FILTER 1-2
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%if %1 == 4
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movq m0, [r0 -4]
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movq m1, [r0+ r1-4]
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movq m2, [r0+2*r1-4]
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movq m3, [r0+ r3-4]
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TRANSPOSE4x4B 0, 1, 2, 3, 4
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%else
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movq m0, [r0 -4]
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movq m4, [r0+ r1-4]
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movq m1, [r0+2*r1-4]
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movq m5, [r0+ r3-4]
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movq m2, [r4 -4]
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movq m6, [r4+ r1-4]
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movq m3, [r4+2*r1-4]
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movq m7, [r4+ r3-4]
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punpcklbw m0, m4
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punpcklbw m1, m5
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punpcklbw m2, m6
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punpcklbw m3, m7
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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%endif
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pxor m5, m5
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UNPACK_8TO16 bw, 6, 0, 5
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UNPACK_8TO16 bw, 7, 1, 5
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VC1_LOOP_FILTER_A0 m6, m0, m7, m1
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UNPACK_8TO16 bw, 4, 2, 5
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mova m0, m1 ; m0 = p0
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VC1_LOOP_FILTER_A0 m7, m1, m4, m2
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UNPACK_8TO16 bw, 1, 3, 5
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mova m5, m4
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VC1_LOOP_FILTER_A0 m5, m2, m1, m3
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SWAP 1, 4 ; m1 = q0
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VC1_FILTER %1
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punpcklbw m0, m1
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%if %0 > 1
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STORE_4_WORDS_MMX [r0-1], [r0+r1-1], [r0+2*r1-1], [r0+r3-1], m0, %2
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%if %1 > 4
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psrldq m0, 4
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STORE_4_WORDS_MMX [r4-1], [r4+r1-1], [r4+2*r1-1], [r4+r3-1], m0, %2
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%endif
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%else
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STORE_4_WORDS_SSE4 [r0-1], [r0+r1-1], [r0+2*r1-1], [r0+r3-1], m0, 0
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STORE_4_WORDS_SSE4 [r4-1], [r4+r1-1], [r4+2*r1-1], [r4+r3-1], m0, 4
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%endif
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%endmacro
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%macro START_V_FILTER 0
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mov r4, r0
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lea r3, [4*r1]
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sub r4, r3
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lea r3, [r1+2*r1]
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imul r2, 0x01010101
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%endmacro
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%macro START_H_FILTER 1
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lea r3, [r1+2*r1]
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%if %1 > 4
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lea r4, [r0+4*r1]
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%endif
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imul r2, 0x01010101
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%endmacro
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%macro VC1_LF_MMX 1
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INIT_MMX
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cglobal vc1_v_loop_filter_internal_%1
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VC1_V_LOOP_FILTER 4, d
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ret
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cglobal vc1_h_loop_filter_internal_%1
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VC1_H_LOOP_FILTER 4, r4
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ret
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; void ff_vc1_v_loop_filter4_mmx2(uint8_t *src, int stride, int pq)
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cglobal vc1_v_loop_filter4_%1, 3,5,0
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START_V_FILTER
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call vc1_v_loop_filter_internal_%1
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RET
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; void ff_vc1_h_loop_filter4_mmx2(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter4_%1, 3,5,0
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START_H_FILTER 4
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call vc1_h_loop_filter_internal_%1
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RET
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; void ff_vc1_v_loop_filter8_mmx2(uint8_t *src, int stride, int pq)
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cglobal vc1_v_loop_filter8_%1, 3,5,0
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START_V_FILTER
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call vc1_v_loop_filter_internal_%1
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add r4, 4
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add r0, 4
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call vc1_v_loop_filter_internal_%1
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RET
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; void ff_vc1_h_loop_filter8_mmx2(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter8_%1, 3,5,0
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START_H_FILTER 4
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call vc1_h_loop_filter_internal_%1
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lea r0, [r0+4*r1]
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call vc1_h_loop_filter_internal_%1
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RET
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%endmacro
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%define PABSW PABSW_MMX2
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VC1_LF_MMX mmx2
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INIT_XMM
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; void ff_vc1_v_loop_filter8_sse2(uint8_t *src, int stride, int pq)
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cglobal vc1_v_loop_filter8_sse2, 3,5,8
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START_V_FILTER
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VC1_V_LOOP_FILTER 8, q
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RET
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; void ff_vc1_h_loop_filter8_sse2(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter8_sse2, 3,6,8
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START_H_FILTER 8
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VC1_H_LOOP_FILTER 8, r5
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RET
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%define PABSW PABSW_SSSE3
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INIT_MMX
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; void ff_vc1_v_loop_filter4_ssse3(uint8_t *src, int stride, int pq)
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cglobal vc1_v_loop_filter4_ssse3, 3,5,0
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START_V_FILTER
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VC1_V_LOOP_FILTER 4, d
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RET
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; void ff_vc1_h_loop_filter4_ssse3(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter4_ssse3, 3,5,0
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START_H_FILTER 4
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VC1_H_LOOP_FILTER 4, r4
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RET
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INIT_XMM
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; void ff_vc1_v_loop_filter8_ssse3(uint8_t *src, int stride, int pq)
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cglobal vc1_v_loop_filter8_ssse3, 3,5,8
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START_V_FILTER
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VC1_V_LOOP_FILTER 8, q
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RET
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; void ff_vc1_h_loop_filter8_ssse3(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter8_ssse3, 3,6,8
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START_H_FILTER 8
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VC1_H_LOOP_FILTER 8, r5
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RET
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; void ff_vc1_h_loop_filter8_sse4(uint8_t *src, int stride, int pq)
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cglobal vc1_h_loop_filter8_sse4, 3,5,8
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START_H_FILTER 8
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VC1_H_LOOP_FILTER 8
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RET
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