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https://github.com/FFmpeg/FFmpeg.git
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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
180 lines
4.6 KiB
NASM
180 lines
4.6 KiB
NASM
;******************************************************************************
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;* SIMD-optimized quarterpel functions
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;* Copyright (c) 2008 Loren Merritt
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;* Copyright (c) 2003-2013 Michael Niedermayer
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;* Copyright (c) 2013 Daniel Kang
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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%macro op_avgh 3
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movh %3, %2
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pavgb %1, %3
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movh %2, %1
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%endmacro
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%macro op_avg 2
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pavgb %1, %2
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mova %2, %1
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%endmacro
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%macro op_puth 2-3
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movh %2, %1
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%endmacro
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%macro op_put 2
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mova %2, %1
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%endmacro
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; void ff_put/avg_pixels4_l2_mmxext(uint8_t *dst, uint8_t *src1, uint8_t *src2,
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; int dstStride, int src1Stride, int h)
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%macro PIXELS4_L2 1
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%define OP op_%1h
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cglobal %1_pixels4_l2, 6,6
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movsxdifnidn r3, r3d
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movsxdifnidn r4, r4d
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test r5d, 1
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je .loop
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movd m0, [r1]
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movd m1, [r2]
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add r1, r4
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add r2, 4
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pavgb m0, m1
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OP m0, [r0], m3
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add r0, r3
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dec r5d
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.loop:
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mova m0, [r1]
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mova m1, [r1+r4]
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lea r1, [r1+2*r4]
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pavgb m0, [r2]
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pavgb m1, [r2+4]
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OP m0, [r0], m3
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OP m1, [r0+r3], m3
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lea r0, [r0+2*r3]
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mova m0, [r1]
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mova m1, [r1+r4]
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lea r1, [r1+2*r4]
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pavgb m0, [r2+8]
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pavgb m1, [r2+12]
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OP m0, [r0], m3
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OP m1, [r0+r3], m3
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lea r0, [r0+2*r3]
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add r2, 16
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sub r5d, 4
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jne .loop
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RET
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%endmacro
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INIT_MMX mmxext
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PIXELS4_L2 put
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PIXELS4_L2 avg
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; void ff_put/avg_pixels8_l2_mmxext(uint8_t *dst, uint8_t *src1, uint8_t *src2,
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; int dstStride, int src1Stride, int h)
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%macro PIXELS8_L2 1
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%define OP op_%1
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cglobal %1_pixels8_l2, 6,6
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movsxdifnidn r3, r3d
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movsxdifnidn r4, r4d
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test r5d, 1
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je .loop
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mova m0, [r1]
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mova m1, [r2]
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add r1, r4
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add r2, 8
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pavgb m0, m1
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OP m0, [r0]
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add r0, r3
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dec r5d
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.loop:
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mova m0, [r1]
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mova m1, [r1+r4]
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lea r1, [r1+2*r4]
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pavgb m0, [r2]
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pavgb m1, [r2+8]
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OP m0, [r0]
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OP m1, [r0+r3]
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lea r0, [r0+2*r3]
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mova m0, [r1]
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mova m1, [r1+r4]
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lea r1, [r1+2*r4]
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pavgb m0, [r2+16]
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pavgb m1, [r2+24]
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OP m0, [r0]
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OP m1, [r0+r3]
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lea r0, [r0+2*r3]
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add r2, 32
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sub r5d, 4
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jne .loop
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RET
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%endmacro
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INIT_MMX mmxext
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PIXELS8_L2 put
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PIXELS8_L2 avg
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; void ff_put/avg_pixels16_l2_mmxext(uint8_t *dst, uint8_t *src1, uint8_t *src2,
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; int dstStride, int src1Stride, int h)
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%macro PIXELS16_L2 1
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%define OP op_%1
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cglobal %1_pixels16_l2, 6,6
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movsxdifnidn r3, r3d
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movsxdifnidn r4, r4d
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test r5d, 1
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je .loop
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mova m0, [r1]
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mova m1, [r1+8]
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pavgb m0, [r2]
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pavgb m1, [r2+8]
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add r1, r4
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add r2, 16
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OP m0, [r0]
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OP m1, [r0+8]
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add r0, r3
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dec r5d
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.loop:
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mova m0, [r1]
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mova m1, [r1+8]
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add r1, r4
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pavgb m0, [r2]
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pavgb m1, [r2+8]
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OP m0, [r0]
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OP m1, [r0+8]
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add r0, r3
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mova m0, [r1]
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mova m1, [r1+8]
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add r1, r4
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pavgb m0, [r2+16]
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pavgb m1, [r2+24]
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OP m0, [r0]
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OP m1, [r0+8]
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add r0, r3
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add r2, 32
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sub r5d, 2
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jne .loop
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RET
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%endmacro
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INIT_MMX mmxext
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PIXELS16_L2 put
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PIXELS16_L2 avg
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