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82ae8a44e6
* commit '5b59a9fc6152169599561f04b4f66370edda5c9c': x86: dcadsp: implement int8x8_fmul_int32 Merged-by: Michael Niedermayer <michaelni@gmx.at>
91 lines
2.4 KiB
NASM
91 lines
2.4 KiB
NASM
;******************************************************************************
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;* SSE-optimized functions for the DCA decoder
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;* Copyright (C) 2012-2014 Christophe Gisquet <christophe.gisquet@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pf_inv16: times 4 dd 0x3D800000 ; 1/16
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SECTION_TEXT
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; void int8x8_fmul_int32_sse2(float *dst, const int8_t *src, int scale)
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%macro INT8X8_FMUL_INT32 0
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cglobal int8x8_fmul_int32, 3,3,5, dst, src, scale
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cvtsi2ss m0, scalem
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mulss m0, [pf_inv16]
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shufps m0, m0, 0
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%if cpuflag(sse2)
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%if cpuflag(sse4)
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pmovsxbd m1, [srcq+0]
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pmovsxbd m2, [srcq+4]
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%else
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movq m1, [srcq]
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punpcklbw m1, m1
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mova m2, m1
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punpcklwd m1, m1
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punpckhwd m2, m2
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psrad m1, 24
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psrad m2, 24
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%endif
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cvtdq2ps m1, m1
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cvtdq2ps m2, m2
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%else
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movd mm0, [srcq+0]
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movd mm1, [srcq+4]
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punpcklbw mm0, mm0
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punpcklbw mm1, mm1
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movq mm2, mm0
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movq mm3, mm1
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punpcklwd mm0, mm0
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punpcklwd mm1, mm1
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punpckhwd mm2, mm2
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punpckhwd mm3, mm3
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psrad mm0, 24
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psrad mm1, 24
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psrad mm2, 24
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psrad mm3, 24
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cvtpi2ps m1, mm0
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cvtpi2ps m2, mm1
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cvtpi2ps m3, mm2
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cvtpi2ps m4, mm3
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shufps m0, m0, 0
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emms
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shufps m1, m3, q1010
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shufps m2, m4, q1010
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%endif
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mulps m1, m0
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mulps m2, m0
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mova [dstq+ 0], m1
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mova [dstq+16], m2
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REP_RET
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%endmacro
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%if ARCH_X86_32
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INIT_XMM sse
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INT8X8_FMUL_INT32
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%endif
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INIT_XMM sse2
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INT8X8_FMUL_INT32
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INIT_XMM sse4
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INT8X8_FMUL_INT32
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