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b250f9c66d
They are now always defined to either 0 or 1. Originally committed as revision 16590 to svn://svn.ffmpeg.org/ffmpeg/trunk
286 lines
7.2 KiB
ArmAsm
286 lines
7.2 KiB
ArmAsm
/*
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* Alpha optimized DSP utils
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* Copyright (c) 2002 Falk Hueffner <falk@debian.org>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* These functions are scheduled for pca56. They should work
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* reasonably on ev6, though.
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*/
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#include "regdef.h"
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/* Some nicer register names. */
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#define ta t10
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#define tb t11
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#define tc t12
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#define td AT
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/* Danger: these overlap with the argument list and the return value */
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#define te a5
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#define tf a4
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#define tg a3
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#define th v0
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.set noat
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.set noreorder
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.arch pca56
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.text
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/************************************************************************
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* void put_pixels_axp_asm(uint8_t *block, const uint8_t *pixels,
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* int line_size, int h)
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*/
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.align 6
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.globl put_pixels_axp_asm
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.ent put_pixels_axp_asm
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put_pixels_axp_asm:
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.frame sp, 0, ra
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.prologue 0
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#if CONFIG_GPROF
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lda AT, _mcount
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jsr AT, (AT), _mcount
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#endif
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and a1, 7, t0
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beq t0, $aligned
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.align 4
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$unaligned:
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ldq_u t0, 0(a1)
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ldq_u t1, 8(a1)
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addq a1, a2, a1
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nop
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ldq_u t2, 0(a1)
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ldq_u t3, 8(a1)
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addq a1, a2, a1
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nop
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ldq_u t4, 0(a1)
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ldq_u t5, 8(a1)
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addq a1, a2, a1
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nop
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ldq_u t6, 0(a1)
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ldq_u t7, 8(a1)
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extql t0, a1, t0
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addq a1, a2, a1
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extqh t1, a1, t1
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addq a0, a2, t8
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extql t2, a1, t2
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addq t8, a2, t9
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extqh t3, a1, t3
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addq t9, a2, ta
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extql t4, a1, t4
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or t0, t1, t0
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extqh t5, a1, t5
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or t2, t3, t2
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extql t6, a1, t6
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or t4, t5, t4
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extqh t7, a1, t7
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or t6, t7, t6
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stq t0, 0(a0)
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stq t2, 0(t8)
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stq t4, 0(t9)
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subq a3, 4, a3
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stq t6, 0(ta)
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addq ta, a2, a0
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bne a3, $unaligned
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ret
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.align 4
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$aligned:
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ldq t0, 0(a1)
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addq a1, a2, a1
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ldq t1, 0(a1)
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addq a1, a2, a1
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ldq t2, 0(a1)
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addq a1, a2, a1
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ldq t3, 0(a1)
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addq a0, a2, t4
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addq a1, a2, a1
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addq t4, a2, t5
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subq a3, 4, a3
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stq t0, 0(a0)
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addq t5, a2, t6
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stq t1, 0(t4)
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addq t6, a2, a0
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stq t2, 0(t5)
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stq t3, 0(t6)
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bne a3, $aligned
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ret
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.end put_pixels_axp_asm
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/************************************************************************
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* void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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* int line_size)
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*/
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.align 6
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.globl put_pixels_clamped_mvi_asm
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.ent put_pixels_clamped_mvi_asm
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put_pixels_clamped_mvi_asm:
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.frame sp, 0, ra
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.prologue 0
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#if CONFIG_GPROF
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lda AT, _mcount
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jsr AT, (AT), _mcount
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#endif
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lda t8, -1
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lda t9, 8 # loop counter
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zap t8, 0xaa, t8 # 00ff00ff00ff00ff
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.align 4
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1: ldq t0, 0(a0)
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ldq t1, 8(a0)
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ldq t2, 16(a0)
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ldq t3, 24(a0)
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maxsw4 t0, zero, t0
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subq t9, 2, t9
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maxsw4 t1, zero, t1
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lda a0, 32(a0)
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maxsw4 t2, zero, t2
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addq a1, a2, ta
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maxsw4 t3, zero, t3
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minsw4 t0, t8, t0
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minsw4 t1, t8, t1
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minsw4 t2, t8, t2
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minsw4 t3, t8, t3
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pkwb t0, t0
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pkwb t1, t1
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pkwb t2, t2
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pkwb t3, t3
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stl t0, 0(a1)
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stl t1, 4(a1)
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addq ta, a2, a1
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stl t2, 0(ta)
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stl t3, 4(ta)
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bne t9, 1b
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ret
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.end put_pixels_clamped_mvi_asm
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/************************************************************************
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* void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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* int line_size)
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*/
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.align 6
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.globl add_pixels_clamped_mvi_asm
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.ent add_pixels_clamped_mvi_asm
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add_pixels_clamped_mvi_asm:
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.frame sp, 0, ra
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.prologue 0
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#if CONFIG_GPROF
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lda AT, _mcount
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jsr AT, (AT), _mcount
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#endif
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lda t1, -1
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lda th, 8
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zap t1, 0x33, tg
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nop
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srl tg, 1, t0
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xor tg, t0, tg # 0x8000800080008000
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zap t1, 0xaa, tf # 0x00ff00ff00ff00ff
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.align 4
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1: ldl t1, 0(a1) # pix0 (try to hit cache line soon)
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ldl t4, 4(a1) # pix1
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addq a1, a2, te # pixels += line_size
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ldq t0, 0(a0) # shorts0
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ldl t7, 0(te) # pix2 (try to hit cache line soon)
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ldl ta, 4(te) # pix3
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ldq t3, 8(a0) # shorts1
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ldq t6, 16(a0) # shorts2
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ldq t9, 24(a0) # shorts3
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unpkbw t1, t1 # 0 0 (quarter/op no.)
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and t0, tg, t2 # 0 1
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unpkbw t4, t4 # 1 0
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bic t0, tg, t0 # 0 2
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unpkbw t7, t7 # 2 0
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and t3, tg, t5 # 1 1
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addq t0, t1, t0 # 0 3
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xor t0, t2, t0 # 0 4
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unpkbw ta, ta # 3 0
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and t6, tg, t8 # 2 1
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maxsw4 t0, zero, t0 # 0 5
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bic t3, tg, t3 # 1 2
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bic t6, tg, t6 # 2 2
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minsw4 t0, tf, t0 # 0 6
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addq t3, t4, t3 # 1 3
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pkwb t0, t0 # 0 7
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xor t3, t5, t3 # 1 4
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maxsw4 t3, zero, t3 # 1 5
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addq t6, t7, t6 # 2 3
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xor t6, t8, t6 # 2 4
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and t9, tg, tb # 3 1
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minsw4 t3, tf, t3 # 1 6
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bic t9, tg, t9 # 3 2
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maxsw4 t6, zero, t6 # 2 5
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addq t9, ta, t9 # 3 3
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stl t0, 0(a1) # 0 8
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minsw4 t6, tf, t6 # 2 6
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xor t9, tb, t9 # 3 4
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maxsw4 t9, zero, t9 # 3 5
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lda a0, 32(a0) # block += 16;
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pkwb t3, t3 # 1 7
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minsw4 t9, tf, t9 # 3 6
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subq th, 2, th
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pkwb t6, t6 # 2 7
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pkwb t9, t9 # 3 7
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stl t3, 4(a1) # 1 8
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addq te, a2, a1 # pixels += line_size
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stl t6, 0(te) # 2 8
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stl t9, 4(te) # 3 8
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bne th, 1b
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ret
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.end add_pixels_clamped_mvi_asm
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