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https://github.com/FFmpeg/FFmpeg.git
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a6493a8fbd
It contains optimizations that are not specific to i386 and libavutil uses this naming scheme already. Originally committed as revision 16270 to svn://svn.ffmpeg.org/ffmpeg/trunk
174 lines
5.1 KiB
C
174 lines
5.1 KiB
C
/*
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* FFT/MDCT transform with Extended 3DNow! optimizations
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* Copyright (c) 2006-2008 Zuxy MENG Jie, Loren Merritt
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/x86_cpu.h"
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#include "libavcodec/dsputil.h"
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DECLARE_ALIGNED_8(static const int, m1m1[2]) = { 1<<31, 1<<31 };
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#ifdef EMULATE_3DNOWEXT
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#define PSWAPD(s,d)\
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"movq "#s","#d"\n"\
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"psrlq $32,"#d"\n"\
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"punpckldq "#s","#d"\n"
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#define ff_fft_calc_3dn2 ff_fft_calc_3dn
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#define ff_fft_dispatch_3dn2 ff_fft_dispatch_3dn
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#define ff_fft_dispatch_interleave_3dn2 ff_fft_dispatch_interleave_3dn
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#define ff_imdct_calc_3dn2 ff_imdct_calc_3dn
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#define ff_imdct_half_3dn2 ff_imdct_half_3dn
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#else
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#define PSWAPD(s,d) "pswapd "#s","#d"\n"
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#endif
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void ff_fft_dispatch_3dn2(FFTComplex *z, int nbits);
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void ff_fft_dispatch_interleave_3dn2(FFTComplex *z, int nbits);
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void ff_fft_calc_3dn2(FFTContext *s, FFTComplex *z)
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{
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int n = 1<<s->nbits;
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int i;
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ff_fft_dispatch_interleave_3dn2(z, s->nbits);
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__asm__ volatile("femms");
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if(n <= 8)
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for(i=0; i<n; i+=2)
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FFSWAP(FFTSample, z[i].im, z[i+1].re);
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}
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void ff_imdct_half_3dn2(MDCTContext *s, FFTSample *output, const FFTSample *input)
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{
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x86_reg j, k;
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long n = 1 << s->nbits;
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long n2 = n >> 1;
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long n4 = n >> 2;
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long n8 = n >> 3;
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const uint16_t *revtab = s->fft.revtab;
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const FFTSample *tcos = s->tcos;
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const FFTSample *tsin = s->tsin;
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const FFTSample *in1, *in2;
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FFTComplex *z = (FFTComplex *)output;
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/* pre rotation */
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in1 = input;
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in2 = input + n2 - 1;
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#ifdef EMULATE_3DNOWEXT
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__asm__ volatile("movd %0, %%mm7" ::"r"(1<<31));
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#endif
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for(k = 0; k < n4; k++) {
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// FIXME a single block is faster, but gcc 2.95 and 3.4.x on 32bit can't compile it
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__asm__ volatile(
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"movd %0, %%mm0 \n"
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"movd %2, %%mm1 \n"
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"punpckldq %1, %%mm0 \n"
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"punpckldq %3, %%mm1 \n"
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"movq %%mm0, %%mm2 \n"
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PSWAPD( %%mm1, %%mm3 )
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"pfmul %%mm1, %%mm0 \n"
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"pfmul %%mm3, %%mm2 \n"
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#ifdef EMULATE_3DNOWEXT
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"movq %%mm0, %%mm1 \n"
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"punpckhdq %%mm2, %%mm0 \n"
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"punpckldq %%mm2, %%mm1 \n"
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"pxor %%mm7, %%mm0 \n"
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"pfadd %%mm1, %%mm0 \n"
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#else
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"pfpnacc %%mm2, %%mm0 \n"
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#endif
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::"m"(in2[-2*k]), "m"(in1[2*k]),
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"m"(tcos[k]), "m"(tsin[k])
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);
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__asm__ volatile(
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"movq %%mm0, %0 \n\t"
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:"=m"(z[revtab[k]])
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);
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}
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ff_fft_dispatch_3dn2(z, s->fft.nbits);
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#define CMUL(j,mm0,mm1)\
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"movq (%2,"#j",2), %%mm6 \n"\
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"movq 8(%2,"#j",2), "#mm0"\n"\
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"movq %%mm6, "#mm1"\n"\
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"movq "#mm0",%%mm7 \n"\
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"pfmul (%3,"#j"), %%mm6 \n"\
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"pfmul (%4,"#j"), "#mm0"\n"\
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"pfmul (%4,"#j"), "#mm1"\n"\
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"pfmul (%3,"#j"), %%mm7 \n"\
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"pfsub %%mm6, "#mm0"\n"\
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"pfadd %%mm7, "#mm1"\n"
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/* post rotation */
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j = -n2;
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k = n2-8;
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__asm__ volatile(
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"1: \n"
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CMUL(%0, %%mm0, %%mm1)
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CMUL(%1, %%mm2, %%mm3)
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"movd %%mm0, (%2,%0,2) \n"
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"movd %%mm1,12(%2,%1,2) \n"
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"movd %%mm2, (%2,%1,2) \n"
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"movd %%mm3,12(%2,%0,2) \n"
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"psrlq $32, %%mm0 \n"
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"psrlq $32, %%mm1 \n"
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"psrlq $32, %%mm2 \n"
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"psrlq $32, %%mm3 \n"
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"movd %%mm0, 8(%2,%0,2) \n"
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"movd %%mm1, 4(%2,%1,2) \n"
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"movd %%mm2, 8(%2,%1,2) \n"
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"movd %%mm3, 4(%2,%0,2) \n"
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"sub $8, %1 \n"
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"add $8, %0 \n"
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"jl 1b \n"
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:"+r"(j), "+r"(k)
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:"r"(z+n8), "r"(tcos+n8), "r"(tsin+n8)
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:"memory"
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);
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__asm__ volatile("femms");
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}
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void ff_imdct_calc_3dn2(MDCTContext *s, FFTSample *output, const FFTSample *input)
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{
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x86_reg j, k;
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long n = 1 << s->nbits;
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long n4 = n >> 2;
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ff_imdct_half_3dn2(s, output+n4, input);
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j = -n;
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k = n-8;
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__asm__ volatile(
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"movq %4, %%mm7 \n"
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"1: \n"
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PSWAPD((%2,%1), %%mm0)
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PSWAPD((%3,%0), %%mm1)
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"pxor %%mm7, %%mm0 \n"
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"movq %%mm1, (%3,%1) \n"
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"movq %%mm0, (%2,%0) \n"
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"sub $8, %1 \n"
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"add $8, %0 \n"
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"jl 1b \n"
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:"+r"(j), "+r"(k)
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:"r"(output+n4), "r"(output+n4*3),
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"m"(*m1m1)
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);
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__asm__ volatile("femms");
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}
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