mirror of
https://github.com/FFmpeg/FFmpeg.git
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b50910e9a9
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
254 lines
14 KiB
C
254 lines
14 KiB
C
/*
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* Loongson SIMD optimized xvid idct
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*
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* Copyright (c) 2015 Loongson Technology Corporation Limited
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* Copyright (c) 2015 Zhou Xiaoyong <zhouxiaoyong@loongson.cn>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "idctdsp_mips.h"
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#include "xvididct_mips.h"
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#define BITS_INV_ACC 5 // 4 or 5 for IEEE
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#define SHIFT_INV_ROW (16 - BITS_INV_ACC) //11
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#define SHIFT_INV_COL (1 + BITS_INV_ACC) //6
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#define RND_INV_ROW (1024 * (6 - BITS_INV_ACC))
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#define RND_INV_COL (16 * (BITS_INV_ACC - 3))
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#define RND_INV_CORR (RND_INV_COL - 1)
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#define BITS_FRW_ACC 3 // 2 or 3 for accuracy
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#define SHIFT_FRW_COL BITS_FRW_ACC
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#define SHIFT_FRW_ROW (BITS_FRW_ACC + 17)
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#define RND_FRW_ROW (262144*(BITS_FRW_ACC - 1))
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DECLARE_ALIGNED(8, static const int16_t, tg_1_16)[4*4] = {
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13036, 13036, 13036, 13036, // tg * (2<<16) + 0.5
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27146, 27146, 27146, 27146, // tg * (2<<16) + 0.5
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-21746,-21746,-21746,-21746, // tg * (2<<16) + 0.5
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23170, 23170, 23170, 23170 // cos * (2<<15) + 0.5
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};
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DECLARE_ALIGNED(8, static const int32_t, rounder_0)[2*8] = {
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65536,65536,
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3597, 3597,
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2260, 2260,
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1203, 1203,
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0, 0,
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120, 120,
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512, 512,
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512, 512
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};
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DECLARE_ALIGNED(8, static const int16_t, tab_i_04_mmi)[32*4] = {
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16384, 21407, 16384, 8867, // w05 w04 w01 w00
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16384, 8867,-16384,-21407, // w07 w06 w03 w02
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16384, -8867, 16384,-21407, // w13 w12 w09 w08
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-16384, 21407, 16384, -8867, // w15 w14 w11 w10
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22725, 19266, 19266, -4520, // w21 w20 w17 w16
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12873, 4520,-22725,-12873, // w23 w22 w19 w18
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12873,-22725, 4520,-12873, // w29 w28 w25 w24
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4520, 19266, 19266,-22725, // w31 w30 w27 w26
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22725, 29692, 22725, 12299, // w05 w04 w01 w00
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22725, 12299,-22725,-29692, // w07 w06 w03 w02
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22725,-12299, 22725,-29692, // w13 w12 w09 w08
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-22725, 29692, 22725,-12299, // w15 w14 w11 w10
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31521, 26722, 26722, -6270, // w21 w20 w17 w16
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17855, 6270,-31521,-17855, // w23 w22 w19 w18
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17855,-31521, 6270,-17855, // w29 w28 w25 w24
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6270, 26722, 26722,-31521, // w31 w30 w27 w26
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21407, 27969, 21407, 11585, // w05 w04 w01 w00
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21407, 11585,-21407,-27969, // w07 w06 w03 w02
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21407,-11585, 21407,-27969, // w13 w12 w09 w08
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-21407, 27969, 21407,-11585, // w15 w14 w11 w10
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29692, 25172, 25172, -5906, // w21 w20 w17 w16
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16819, 5906,-29692,-16819, // w23 w22 w19 w18
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16819,-29692, 5906,-16819, // w29 w28 w25 w24
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5906, 25172, 25172,-29692, // w31 w30 w27 w26
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19266, 25172, 19266, 10426, // w05 w04 w01 w00
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19266, 10426,-19266,-25172, // w07 w06 w03 w02
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19266,-10426, 19266,-25172, // w13 w12 w09 w08
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-19266, 25172, 19266,-10426, // w15 w14 w11 w10
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26722, 22654, 22654, -5315, // w21 w20 w17 w16
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15137, 5315,-26722,-15137, // w23 w22 w19 w18
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15137,-26722, 5315,-15137, // w29 w28 w25 w24
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5315, 22654, 22654,-26722, // w31 w30 w27 w26
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};
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#define DCT_8_INV_ROW_MMI(A1,A2,A3,A4) \
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"dli $10, 0x88 \n\t" \
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"ldc1 $f4, "#A1" \n\t" /* 0; x3 x2 x1 x0 */\
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"dmtc1 $10, $f16 \n\t" \
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"ldc1 $f10, 8+"#A1" \n\t" /* 1; x7 x6 x5 x4 */\
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"ldc1 $f6, "#A3" \n\t" /* 3; w05 w04 w01 w00 */\
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"pshufh $f0, $f4, $f16 \n\t" /* x2 x0 x2 x0 */\
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"ldc1 $f8, 8+"#A3" \n\t" /* 4; w07 w06 w03 w02 */\
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"ldc1 $f12, 32+"#A3" \n\t" /* 6; w21 w20 w17 w16 */\
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"pmaddhw $f6, $f6, $f0 \n\t" /* x2*w05+x0*w04 x2*w01+x0*w00 */\
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"dli $10, 0xdd \n\t" \
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"pshufh $f2, $f10, $f16 \n\t" /* x6 x4 x6 x4 */\
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"dmtc1 $10, $f16 \n\t" \
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"pmaddhw $f8, $f8, $f2 \n\t" /* x6*w07+x4*w06 x6*w03+x4*w02 */\
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"ldc1 $f14, 40+"#A3" \n\t" /* 7; w23 w22 w19 w18 */\
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"pshufh $f4, $f4, $f16 \n\t" /* x3 x1 x3 x1 */\
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"pmaddhw $f12, $f12, $f4 \n\t" /* x3*w21+x1*w20 x3*w17+x1*w16 */\
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"pshufh $f10, $f10, $f16 \n\t" /* x7 x5 x7 x5 */\
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"ldc1 $f18, "#A4" \n\t" \
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"pmaddhw $f14, $f14, $f10 \n\t" /* x7*w23+x5*w22 x7*w19+x5*w18 */\
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"paddw $f6, $f6, $f18 \n\t" /* +%4 */\
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"ldc1 $f16, 16+"#A3" \n\t" \
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"pmaddhw $f0, $f0, $f16 \n\t" /* x2*w13+x0*w12 x2*w09+x0*w08 */\
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"ldc1 $f16, 24+"#A3" \n\t" \
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"paddw $f6, $f6, $f8 \n\t" /* 4; a1=sum(even1) a0=sum(even0) */\
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"pmaddhw $f2, $f2, $f16 \n\t" /* x6*w15+x4*w14 x6*w11+x4*w10 */\
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"ldc1 $f16, 48+"#A3" \n\t" \
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"pmaddhw $f4, $f4, $f16 \n\t" /* x3*w29+x1*w28 x3*w25+x1*w24 */\
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"ldc1 $f16, 56+"#A3" \n\t" \
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"paddw $f12, $f12, $f14 \n\t" /* 7; b1=sum(odd1) b0=sum(odd0) */\
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"dli $10, 11 \n\t" \
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"pmaddhw $f10, $f10, $f16 \n\t" /* x7*w31+x5*w30 x7*w27+x5*w26 */\
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"dmtc1 $10, $f16 \n\t" \
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"psubw $f8, $f6, $f12 \n\t" /* 6; a1-b1 a0-b0 */\
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"paddw $f6, $f6, $f12 \n\t" /* a1+b1 a0+b0 */\
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"paddw $f0, $f0, $f18 \n\t" /* +%4 */\
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"psraw $f6, $f6, $f16 \n\t" /* y1=a1+b1 y0=a0+b0 */\
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"paddw $f0, $f0, $f2 \n\t" /* 1; a3=sum(even3) a2=sum(even2) */\
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"paddw $f4, $f4, $f10 \n\t" /* 5; b3=sum(odd3) b2=sum(odd2) */\
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"psraw $f8, $f8, $f16 \n\t" /* y6=a1-b1 y7=a0-b0 */\
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"psubw $f14, $f0, $f4 \n\t" /* 2; a3-b3 a2-b2 */\
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"paddw $f0, $f0, $f4 \n\t" /* a3+b3 a2+b2 */\
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"psraw $f0, $f0, $f16 \n\t" /* y3=a3+b3 y2=a2+b2 */\
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"psraw $f14, $f14, $f16 \n\t" /* y4=a3-b3 y5=a2-b2 */\
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"dli $10, 0xb1 \n\t" \
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"packsswh $f6, $f6, $f0 \n\t" /* 0; y3 y2 y1 y0 */\
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"dmtc1 $10, $f16 \n\t" \
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"packsswh $f14, $f14, $f8 \n\t" /* 4; y6 y7 y4 y5 */\
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"sdc1 $f6, "#A2" \n\t" /* 3; save y3 y2 y1 y0 */\
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"pshufh $f14, $f14, $f16 \n\t" /* y7 y6 y5 y4 */\
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"sdc1 $f14, 8+"#A2" \n\t" /* 7; save y7 y6 y5 y4 */\
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#define DCT_8_INV_COL(A1,A2) \
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"ldc1 $f2, 2*8(%3) \n\t" \
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"ldc1 $f6, 16*3+"#A1" \n\t" \
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"ldc1 $f10, 16*5+"#A1" \n\t" \
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"pmulhh $f0, $f2, $f6 \n\t" /* x3*(tg_3_16-1) */\
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"ldc1 $f4, 0(%3) \n\t" \
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"pmulhh $f2, $f2, $f10 \n\t" /* x5*(tg_3_16-1) */\
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"ldc1 $f14, 16*7+"#A1" \n\t" \
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"ldc1 $f12, 16*1+"#A1" \n\t" \
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"pmulhh $f8, $f4, $f14 \n\t" /* x7*tg_1_16 */\
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"paddsh $f0, $f0, $f6 \n\t" /* x3*tg_3_16 */\
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"pmulhh $f4, $f4, $f12 \n\t" /* x1*tg_1_16 */\
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"paddsh $f2, $f2, $f6 \n\t" /* x3+x5*(tg_3_16-1) */\
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"psubsh $f0, $f0, $f10 \n\t" /* x3*tg_3_16-x5 = tm35 */\
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"ldc1 $f6, 3*8(%3) \n\t" \
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"paddsh $f2, $f2, $f10 \n\t" /* x3+x5*tg_3_16 = tp35 */\
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"paddsh $f8, $f8, $f12 \n\t" /* x1+tg_1_16*x7 = tp17 */\
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"psubsh $f4, $f4, $f14 \n\t" /* x1*tg_1_16-x7 = tm17 */\
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"paddsh $f10, $f8, $f2 \n\t" /* tp17+tp35 = b0 */\
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"psubsh $f12, $f4, $f0 \n\t" /* tm17-tm35 = b3 */\
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"psubsh $f8, $f8, $f2 \n\t" /* tp17-tp35 = t1 */\
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"paddsh $f4, $f4, $f0 \n\t" /* tm17+tm35 = t2 */\
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"ldc1 $f14, 1*8(%3) \n\t" \
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"sdc1 $f10, 3*16+"#A2" \n\t" /* save b0 */\
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"paddsh $f2, $f8, $f4 \n\t" /* t1+t2 */\
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"sdc1 $f12, 5*16+"#A2" \n\t" /* save b3 */\
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"psubsh $f8, $f8, $f4 \n\t" /* t1-t2 */\
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"ldc1 $f10, 2*16+"#A1" \n\t" \
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"ldc1 $f12, 6*16+"#A1" \n\t" \
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"pmulhh $f0, $f14, $f10 \n\t" /* x2*tg_2_16 */\
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"pmulhh $f14, $f14, $f12 \n\t" /* x6*tg_2_16 */\
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"pmulhh $f2, $f2, $f6 \n\t" /* ocos_4_16*(t1+t2) = b1/2 */\
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"ldc1 $f4, 0*16+"#A1" \n\t" \
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"pmulhh $f8, $f8, $f6 \n\t" /* ocos_4_16*(t1-t2) = b2/2 */\
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"psubsh $f0, $f0, $f12 \n\t" /* t2*tg_2_16-x6 = tm26 */\
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"ldc1 $f12, 4*16+"#A1" \n\t" \
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"paddsh $f14, $f14, $f10 \n\t" /* x2+x6*tg_2_16 = tp26 */\
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"psubsh $f6, $f4, $f12 \n\t" /* x0-x4 = tm04 */\
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"paddsh $f4, $f4, $f12 \n\t" /* x0+x4 = tp04 */\
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"paddsh $f10, $f4, $f14 \n\t" /* tp04+tp26 = a0 */\
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"psubsh $f12, $f6, $f0 \n\t" /* tm04-tm26 = a2 */\
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"psubsh $f4, $f4, $f14 \n\t" /* tp04-tp26 = a3 */\
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"paddsh $f6, $f6, $f0 \n\t" /* tm04+tm26 = a1 */\
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"paddsh $f2, $f2, $f2 \n\t" /* b1 */\
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"paddsh $f8, $f8, $f8 \n\t" /* b2 */\
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"psubsh $f14, $f6, $f2 \n\t" /* a1-b1 */\
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"dli $10, 6 \n\t" \
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"paddsh $f6, $f6, $f2 \n\t" /* a1+b1 */\
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"dmtc1 $10, $f16 \n\t" \
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"psubsh $f0, $f12, $f8 \n\t" /* a2-b2 */\
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"paddsh $f12, $f12, $f8 \n\t" /* a2+b2 */\
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"psrah $f6, $f6, $f16 \n\t" /* dst1 */\
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"psrah $f12, $f12, $f16 \n\t" /* dst2 */\
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"ldc1 $f2, 3*16+"#A2" \n\t" /* load b0 */\
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"psrah $f14, $f14, $f16 \n\t" /* dst6 */\
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"psrah $f0, $f0, $f16 \n\t" /* dst5 */\
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"sdc1 $f6, 1*16+"#A2" \n\t" \
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"psubsh $f8, $f10, $f2 \n\t" /* a0-b0 */\
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"paddsh $f10, $f10, $f2 \n\t" /* a0+b0 */\
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"sdc1 $f12, 2*16+"#A2" \n\t" \
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"ldc1 $f6, 5*16+"#A2" \n\t" /* load b3 */\
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"psrah $f10, $f10, $f16 \n\t" /* dst0 */\
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"psrah $f8, $f8, $f16 \n\t" /* dst7 */\
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"sdc1 $f0, 5*16+"#A2" \n\t" \
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"psubsh $f12, $f4, $f6 \n\t" /* a3-b3 */\
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"paddsh $f4, $f4, $f6 \n\t" /* a3+b3 */\
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"sdc1 $f14, 6*16+"#A2" \n\t" \
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"sdc1 $f10, 0*16+"#A2" \n\t" \
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"psrah $f4, $f4, $f16 \n\t" /* dst3 */\
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"sdc1 $f8, 7*16+"#A2" \n\t" \
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"psrah $f12, $f12, $f16 \n\t" /* dst4 */\
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"sdc1 $f4, 3*16+"#A2" \n\t" \
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"sdc1 $f12, 4*16+"#A2" \n\t" \
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void ff_xvid_idct_mmi(int16_t *block)
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{
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__asm__ volatile (
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//# Process each row
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DCT_8_INV_ROW_MMI(0*16(%0), 0*16(%0), 64*0(%2), 8*0(%1))
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DCT_8_INV_ROW_MMI(1*16(%0), 1*16(%0), 64*1(%2), 8*1(%1))
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DCT_8_INV_ROW_MMI(2*16(%0), 2*16(%0), 64*2(%2), 8*2(%1))
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DCT_8_INV_ROW_MMI(3*16(%0), 3*16(%0), 64*3(%2), 8*3(%1))
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DCT_8_INV_ROW_MMI(4*16(%0), 4*16(%0), 64*0(%2), 8*4(%1))
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DCT_8_INV_ROW_MMI(5*16(%0), 5*16(%0), 64*3(%2), 8*5(%1))
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DCT_8_INV_ROW_MMI(6*16(%0), 6*16(%0), 64*2(%2), 8*6(%1))
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DCT_8_INV_ROW_MMI(7*16(%0), 7*16(%0), 64*1(%2), 8*7(%1))
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//# Process the columns (4 at a time)
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DCT_8_INV_COL(0(%0), 0(%0))
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DCT_8_INV_COL(8(%0), 8(%0))
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::"r"(block),"r"(rounder_0),"r"(tab_i_04_mmi),"r"(tg_1_16)
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: "$10"
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);
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}
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void ff_xvid_idct_put_mmi(uint8_t *dest, int32_t line_size, int16_t *block)
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{
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ff_xvid_idct_mmi(block);
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ff_put_pixels_clamped_mmi(block, dest, line_size);
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}
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void ff_xvid_idct_add_mmi(uint8_t *dest, int32_t line_size, int16_t *block)
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{
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ff_xvid_idct_mmi(block);
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ff_add_pixels_clamped_mmi(block, dest, line_size);
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}
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