mirror of
https://github.com/FFmpeg/FFmpeg.git
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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
300 lines
7.2 KiB
NASM
300 lines
7.2 KiB
NASM
;******************************************************************************
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;* x86 optimized discrete wavelet trasnform
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;* Copyright (c) 2010 David Conrad
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* 51, Inc., Foundation Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pw_1991: times 4 dw 9,-1
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cextern pw_1
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cextern pw_2
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cextern pw_8
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cextern pw_16
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SECTION .text
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; %1 -= (%2 + %3 + 2)>>2 %4 is pw_2
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%macro COMPOSE_53iL0 4
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paddw %2, %3
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paddw %2, %4
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psraw %2, 2
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psubw %1, %2
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%endm
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; m1 = %1 + (-m0 + 9*m1 + 9*%2 -%3 + 8)>>4
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; if %4 is supplied, %1 is loaded unaligned from there
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; m2: clobbered m3: pw_8 m4: pw_1991
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%macro COMPOSE_DD97iH0 3-4
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paddw m0, %3
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paddw m1, %2
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psubw m0, m3
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mova m2, m1
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punpcklwd m1, m0
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punpckhwd m2, m0
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pmaddwd m1, m4
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pmaddwd m2, m4
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%if %0 > 3
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movu %1, %4
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%endif
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psrad m1, 4
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psrad m2, 4
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packssdw m1, m2
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paddw m1, %1
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%endm
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%macro COMPOSE_VERTICAL 1
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; void vertical_compose53iL0(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2,
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; int width)
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cglobal vertical_compose53iL0_%1, 4,4,1, b0, b1, b2, width
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mova m2, [pw_2]
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%if ARCH_X86_64
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mov widthd, widthd
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%endif
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.loop:
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sub widthq, mmsize/2
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mova m1, [b0q+2*widthq]
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mova m0, [b1q+2*widthq]
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COMPOSE_53iL0 m0, m1, [b2q+2*widthq], m2
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mova [b1q+2*widthq], m0
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jg .loop
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RET
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; void vertical_compose_dirac53iH0(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2,
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; int width)
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cglobal vertical_compose_dirac53iH0_%1, 4,4,1, b0, b1, b2, width
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mova m1, [pw_1]
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%if ARCH_X86_64
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mov widthd, widthd
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%endif
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.loop:
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sub widthq, mmsize/2
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mova m0, [b0q+2*widthq]
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paddw m0, [b2q+2*widthq]
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paddw m0, m1
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psraw m0, 1
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paddw m0, [b1q+2*widthq]
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mova [b1q+2*widthq], m0
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jg .loop
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RET
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; void vertical_compose_dd97iH0(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2,
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; IDWTELEM *b3, IDWTELEM *b4, int width)
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cglobal vertical_compose_dd97iH0_%1, 6,6,5, b0, b1, b2, b3, b4, width
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mova m3, [pw_8]
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mova m4, [pw_1991]
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%if ARCH_X86_64
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mov widthd, widthd
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%endif
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.loop:
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sub widthq, mmsize/2
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mova m0, [b0q+2*widthq]
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mova m1, [b1q+2*widthq]
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COMPOSE_DD97iH0 [b2q+2*widthq], [b3q+2*widthq], [b4q+2*widthq]
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mova [b2q+2*widthq], m1
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jg .loop
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RET
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; void vertical_compose_dd137iL0(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2,
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; IDWTELEM *b3, IDWTELEM *b4, int width)
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cglobal vertical_compose_dd137iL0_%1, 6,6,6, b0, b1, b2, b3, b4, width
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mova m3, [pw_16]
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mova m4, [pw_1991]
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%if ARCH_X86_64
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mov widthd, widthd
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%endif
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.loop:
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sub widthq, mmsize/2
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mova m0, [b0q+2*widthq]
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mova m1, [b1q+2*widthq]
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mova m5, [b2q+2*widthq]
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paddw m0, [b4q+2*widthq]
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paddw m1, [b3q+2*widthq]
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psubw m0, m3
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mova m2, m1
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punpcklwd m1, m0
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punpckhwd m2, m0
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pmaddwd m1, m4
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pmaddwd m2, m4
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psrad m1, 5
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psrad m2, 5
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packssdw m1, m2
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psubw m5, m1
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mova [b2q+2*widthq], m5
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jg .loop
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RET
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; void vertical_compose_haar(IDWTELEM *b0, IDWTELEM *b1, int width)
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cglobal vertical_compose_haar_%1, 3,4,3, b0, b1, width
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mova m3, [pw_1]
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%if ARCH_X86_64
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mov widthd, widthd
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%endif
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.loop:
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sub widthq, mmsize/2
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mova m1, [b1q+2*widthq]
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mova m0, [b0q+2*widthq]
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mova m2, m1
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paddw m1, m3
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psraw m1, 1
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psubw m0, m1
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mova [b0q+2*widthq], m0
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paddw m2, m0
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mova [b1q+2*widthq], m2
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jg .loop
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RET
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%endmacro
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; extend the left and right edges of the tmp array by %1 and %2 respectively
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%macro EDGE_EXTENSION 3
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mov %3, [tmpq]
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%assign %%i 1
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%rep %1
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mov [tmpq-2*%%i], %3
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%assign %%i %%i+1
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%endrep
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mov %3, [tmpq+2*w2q-2]
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%assign %%i 0
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%rep %2
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mov [tmpq+2*w2q+2*%%i], %3
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%assign %%i %%i+1
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%endrep
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%endmacro
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%macro HAAR_HORIZONTAL 2
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; void horizontal_compose_haari(IDWTELEM *b, IDWTELEM *tmp, int width)
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cglobal horizontal_compose_haar%2i_%1, 3,6,4, b, tmp, w, x, w2, b_w2
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mov w2d, wd
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xor xq, xq
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shr w2d, 1
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lea b_w2q, [bq+wq]
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mova m3, [pw_1]
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.lowpass_loop:
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movu m1, [b_w2q + 2*xq]
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mova m0, [bq + 2*xq]
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paddw m1, m3
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psraw m1, 1
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psubw m0, m1
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mova [tmpq + 2*xq], m0
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add xq, mmsize/2
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cmp xq, w2q
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jl .lowpass_loop
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xor xq, xq
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and w2q, ~(mmsize/2 - 1)
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cmp w2q, mmsize/2
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jl .end
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.highpass_loop:
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movu m1, [b_w2q + 2*xq]
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mova m0, [tmpq + 2*xq]
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paddw m1, m0
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; shift and interleave
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%if %2 == 1
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paddw m0, m3
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paddw m1, m3
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psraw m0, 1
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psraw m1, 1
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%endif
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mova m2, m0
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punpcklwd m0, m1
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punpckhwd m2, m1
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mova [bq+4*xq], m0
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mova [bq+4*xq+mmsize], m2
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add xq, mmsize/2
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cmp xq, w2q
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jl .highpass_loop
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.end:
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RET
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%endmacro
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INIT_XMM
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; void horizontal_compose_dd97i(IDWTELEM *b, IDWTELEM *tmp, int width)
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cglobal horizontal_compose_dd97i_ssse3, 3,6,8, b, tmp, w, x, w2, b_w2
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mov w2d, wd
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xor xd, xd
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shr w2d, 1
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lea b_w2q, [bq+wq]
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movu m4, [bq+wq]
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mova m7, [pw_2]
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pslldq m4, 14
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.lowpass_loop:
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movu m1, [b_w2q + 2*xq]
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mova m0, [bq + 2*xq]
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mova m2, m1
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palignr m1, m4, 14
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mova m4, m2
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COMPOSE_53iL0 m0, m1, m2, m7
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mova [tmpq + 2*xq], m0
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add xd, mmsize/2
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cmp xd, w2d
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jl .lowpass_loop
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EDGE_EXTENSION 1, 2, xw
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; leave the last up to 7 (sse) or 3 (mmx) values for C
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xor xd, xd
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and w2d, ~(mmsize/2 - 1)
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cmp w2d, mmsize/2
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jl .end
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mova m7, [tmpq-mmsize]
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mova m0, [tmpq]
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mova m5, [pw_1]
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mova m3, [pw_8]
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mova m4, [pw_1991]
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.highpass_loop:
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mova m6, m0
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palignr m0, m7, 14
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mova m7, [tmpq + 2*xq + 16]
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mova m1, m7
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mova m2, m7
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palignr m1, m6, 2
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palignr m2, m6, 4
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COMPOSE_DD97iH0 m0, m6, m2, [b_w2q + 2*xq]
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mova m0, m7
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mova m7, m6
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; shift and interleave
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paddw m6, m5
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paddw m1, m5
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psraw m6, 1
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psraw m1, 1
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mova m2, m6
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punpcklwd m6, m1
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punpckhwd m2, m1
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mova [bq+4*xq], m6
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mova [bq+4*xq+mmsize], m2
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add xd, mmsize/2
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cmp xd, w2d
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jl .highpass_loop
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.end:
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RET
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INIT_XMM
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COMPOSE_VERTICAL sse2
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HAAR_HORIZONTAL sse2, 0
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HAAR_HORIZONTAL sse2, 1
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