Rémi Denis-Courmont 29b9d616c2 lavu/float_dsp: rework RISC-V V scalar product ... 1) Take the reductive sum out of the loop, leaving a regular vector addition in the loop. 2) Merge the addition and the multiplication. 3) Unroll. Before: scalarproduct_float_rvv_f32: 832.5 After: scalarproduct_float_rvv_f32: 275.2		2023-07-20 22:54:34 +03:00
..
asm.S	lavu/riscv: helper macro for VTYPE encoding	2022-10-10 02:22:12 +02:00
bswap.h	riscv/bswap: use compiler builtins	2023-05-02 22:08:21 +02:00
cpu.c	lavu: add/use flag for RISC-V Zba extension	2023-07-19 19:29:35 +03:00
cpu.h	lavu/riscv: helper to read the vector length	2022-09-28 11:43:17 +02:00
fixed_dsp_init.c	lavu: add/use flag for RISC-V Zba extension	2023-07-19 19:29:35 +03:00
fixed_dsp_rvv.S	lavu/fixed_dsp: unroll RISC-V V loop	2023-07-17 18:48:42 +03:00
float_dsp_init.c	lavu: add/use flag for RISC-V Zba extension	2023-07-19 19:29:35 +03:00
float_dsp_rvv.S	lavu/float_dsp: rework RISC-V V scalar product	2023-07-20 22:54:34 +03:00
intmath.h	riscv/intmath: use builtins for counting ones	2023-05-02 22:08:25 +02:00
Makefile	lavu/fixeddsp: RISC-V V butterflies_fixed	2022-09-27 13:19:52 +02:00
timer.h