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90a779bed6
Better performance can probably be achieved with a more intricate unrolled loop, but this is a start: add_hfyu_left_pred_bgr32_c: 15084.0 add_hfyu_left_pred_bgr32_rvv_i32: 10280.2 This would actually be cleaner with the RISC-V P extension, but that is not ratified yet (I think?) and usually not supported if V is supported.
54 lines
1.5 KiB
ArmAsm
54 lines
1.5 KiB
ArmAsm
/*
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* Copyright © 2023 Rémi Denis-Courmont.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/riscv/asm.S"
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func ff_add_int16_rvv, zve32x
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1:
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vsetvli t0, a3, e16, m8, ta, ma
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vle16.v v16, (a0)
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sub a3, a3, t0
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vle16.v v24, (a1)
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sh1add a1, t0, a1
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vadd.vv v16, v16, v24
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vand.vx v16, v16, a2
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vse16.v v16, (a0)
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sh1add a0, t0, a0
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bnez a3, 1b
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ret
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endfunc
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func ff_add_hfyu_left_pred_bgr32_rvv, zve32x
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vsetivli zero, 4, e8, m1, ta, ma
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vle8.v v8, (a3)
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sh2add a2, a2, a1
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1:
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vle8.v v0, (a1)
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vadd.vv v8, v8, v0
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addi a1, a1, 4
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vse8.v v8, (a0)
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addi a0, a0, 4
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bne a2, a1, 1b
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vse8.v v8, (a3)
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ret
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endfunc
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