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https://github.com/FFmpeg/FFmpeg.git
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40e6575aa3
This is more spec-compliant because it does not rely on dead-code elimination by the compiler. Especially MSVC has problems with this, as can be seen in https://ffmpeg.org/pipermail/ffmpeg-devel/2022-May/296373.html or https://ffmpeg.org/pipermail/ffmpeg-devel/2022-May/297022.html This commit does not eliminate every instance where we rely on dead code elimination: It only tackles branching to the initialization of arch-specific dsp code, not e.g. all uses of CONFIG_ and HAVE_ checks. But maybe it is already enough to compile FFmpeg with MSVC with whole-programm-optimizations enabled (if one does not disable too many components). Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
272 lines
11 KiB
C
272 lines
11 KiB
C
/*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#if HAVE_SCHED_GETAFFINITY
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#ifndef _GNU_SOURCE
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# define _GNU_SOURCE
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#endif
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#include <sched.h>
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#endif
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#include <stddef.h>
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#include <stdint.h>
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#include <stdatomic.h>
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#include "attributes.h"
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#include "cpu.h"
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#include "cpu_internal.h"
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#include "opt.h"
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#include "common.h"
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#if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
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#include <windows.h>
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#endif
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#if HAVE_SYSCTL
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#if HAVE_SYS_PARAM_H
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#include <sys/param.h>
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#endif
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#if HAVE_UNISTD_H
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#include <unistd.h>
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#endif
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static atomic_int cpu_flags = ATOMIC_VAR_INIT(-1);
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static atomic_int cpu_count = ATOMIC_VAR_INIT(-1);
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static int get_cpu_flags(void)
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{
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#if ARCH_MIPS
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return ff_get_cpu_flags_mips();
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#elif ARCH_AARCH64
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return ff_get_cpu_flags_aarch64();
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#elif ARCH_ARM
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return ff_get_cpu_flags_arm();
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#elif ARCH_PPC
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return ff_get_cpu_flags_ppc();
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#elif ARCH_X86
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return ff_get_cpu_flags_x86();
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#elif ARCH_LOONGARCH
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return ff_get_cpu_flags_loongarch();
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#endif
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return 0;
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}
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void av_force_cpu_flags(int arg){
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if (ARCH_X86 &&
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(arg & ( AV_CPU_FLAG_3DNOW |
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AV_CPU_FLAG_3DNOWEXT |
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AV_CPU_FLAG_MMXEXT |
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AV_CPU_FLAG_SSE |
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AV_CPU_FLAG_SSE2 |
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AV_CPU_FLAG_SSE2SLOW |
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AV_CPU_FLAG_SSE3 |
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AV_CPU_FLAG_SSE3SLOW |
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AV_CPU_FLAG_SSSE3 |
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AV_CPU_FLAG_SSE4 |
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AV_CPU_FLAG_SSE42 |
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AV_CPU_FLAG_AVX |
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AV_CPU_FLAG_AVXSLOW |
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AV_CPU_FLAG_XOP |
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AV_CPU_FLAG_FMA3 |
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AV_CPU_FLAG_FMA4 |
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AV_CPU_FLAG_AVX2 |
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AV_CPU_FLAG_AVX512 ))
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&& !(arg & AV_CPU_FLAG_MMX)) {
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av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
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arg |= AV_CPU_FLAG_MMX;
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}
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atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
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}
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int av_get_cpu_flags(void)
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{
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int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
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if (flags == -1) {
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flags = get_cpu_flags();
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atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
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}
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return flags;
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}
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int av_parse_cpu_caps(unsigned *flags, const char *s)
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{
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static const AVOption cpuflags_opts[] = {
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{ "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
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#if ARCH_PPC
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{ "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
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#elif ARCH_X86
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{ "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
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{ "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
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{ "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
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{ "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
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{ "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
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{ "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
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{ "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
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{ "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
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{ "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
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{ "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
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{ "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
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{ "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
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{ "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
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{ "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
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{ "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
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{ "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
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{ "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
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{ "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
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{ "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
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{ "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
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{ "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
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{ "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
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{ "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
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{ "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
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{ "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
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{ "avx512icl", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512ICL }, .unit = "flags" },
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{ "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
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#define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
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#define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
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#define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
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{ "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
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{ "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
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{ "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
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#define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
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#define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
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#define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
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#define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
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{ "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
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{ "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
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{ "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
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{ "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
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{ "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
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#elif ARCH_ARM
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{ "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
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{ "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
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{ "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
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{ "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
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{ "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
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{ "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
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{ "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
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{ "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
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#elif ARCH_AARCH64
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{ "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
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{ "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
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{ "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
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#elif ARCH_MIPS
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{ "mmi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI }, .unit = "flags" },
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{ "msa", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA }, .unit = "flags" },
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#elif ARCH_LOONGARCH
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{ "lsx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX }, .unit = "flags" },
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{ "lasx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX }, .unit = "flags" },
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#endif
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{ NULL },
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};
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static const AVClass class = {
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.class_name = "cpuflags",
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.item_name = av_default_item_name,
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.option = cpuflags_opts,
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.version = LIBAVUTIL_VERSION_INT,
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};
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const AVClass *pclass = &class;
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return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
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}
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int av_cpu_count(void)
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{
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static atomic_int printed = ATOMIC_VAR_INIT(0);
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int nb_cpus = 1;
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int count = 0;
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#if HAVE_WINRT
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SYSTEM_INFO sysinfo;
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#endif
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#if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
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cpu_set_t cpuset;
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CPU_ZERO(&cpuset);
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if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
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nb_cpus = CPU_COUNT(&cpuset);
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#elif HAVE_GETPROCESSAFFINITYMASK
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DWORD_PTR proc_aff, sys_aff;
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if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
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nb_cpus = av_popcount64(proc_aff);
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#elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
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int mib[2] = { CTL_HW, HW_NCPUONLINE };
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size_t len = sizeof(nb_cpus);
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if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
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nb_cpus = 0;
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#elif HAVE_SYSCTL && defined(HW_NCPU)
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int mib[2] = { CTL_HW, HW_NCPU };
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size_t len = sizeof(nb_cpus);
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if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
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nb_cpus = 0;
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#elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
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nb_cpus = sysconf(_SC_NPROC_ONLN);
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#elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
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nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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#elif HAVE_WINRT
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GetNativeSystemInfo(&sysinfo);
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nb_cpus = sysinfo.dwNumberOfProcessors;
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#endif
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if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed))
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av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
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count = atomic_load_explicit(&cpu_count, memory_order_relaxed);
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if (count > 0) {
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nb_cpus = count;
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av_log(NULL, AV_LOG_DEBUG, "overriding to %d logical cores\n", nb_cpus);
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}
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return nb_cpus;
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}
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void av_cpu_force_count(int count)
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{
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atomic_store_explicit(&cpu_count, count, memory_order_relaxed);
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}
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size_t av_cpu_max_align(void)
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{
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#if ARCH_MIPS
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return ff_get_cpu_max_align_mips();
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#elif ARCH_AARCH64
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return ff_get_cpu_max_align_aarch64();
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#elif ARCH_ARM
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return ff_get_cpu_max_align_arm();
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#elif ARCH_PPC
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return ff_get_cpu_max_align_ppc();
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#elif ARCH_X86
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return ff_get_cpu_max_align_x86();
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#elif ARCH_LOONGARCH
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return ff_get_cpu_max_align_loongarch();
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#endif
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return 8;
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}
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