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checkasm benchmarks on 1.5 GHz Cortex-A72 are as follows. idctdsp.add_pixels_clamped_c: 313.3 idctdsp.add_pixels_clamped_neon: 24.3 idctdsp.put_pixels_clamped_c: 220.3 idctdsp.put_pixels_clamped_neon: 15.5 idctdsp.put_signed_pixels_clamped_c: 210.5 idctdsp.put_signed_pixels_clamped_neon: 19.5 Signed-off-by: Ben Avison <bavison@riscosopen.org> Signed-off-by: Martin Storsjö <martin@martin.st>
131 lines
5.0 KiB
ArmAsm
131 lines
5.0 KiB
ArmAsm
/*
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* IDCT AArch64 NEON optimisations
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*
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* Copyright (c) 2022 Ben Avison <bavison@riscosopen.org>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/aarch64/asm.S"
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// Clamp 16-bit signed block coefficients to unsigned 8-bit
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// On entry:
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// x0 -> array of 64x 16-bit coefficients
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// x1 -> 8-bit results
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// x2 = row stride for results, bytes
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function ff_put_pixels_clamped_neon, export=1
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #64
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ld1 {v4.16b, v5.16b, v6.16b, v7.16b}, [x0]
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sqxtun v0.8b, v0.8h
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sqxtun v1.8b, v1.8h
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sqxtun v2.8b, v2.8h
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sqxtun v3.8b, v3.8h
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sqxtun v4.8b, v4.8h
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st1 {v0.8b}, [x1], x2
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sqxtun v0.8b, v5.8h
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st1 {v1.8b}, [x1], x2
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sqxtun v1.8b, v6.8h
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st1 {v2.8b}, [x1], x2
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sqxtun v2.8b, v7.8h
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st1 {v3.8b}, [x1], x2
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st1 {v4.8b}, [x1], x2
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st1 {v0.8b}, [x1], x2
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st1 {v1.8b}, [x1], x2
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st1 {v2.8b}, [x1]
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ret
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endfunc
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// Clamp 16-bit signed block coefficients to signed 8-bit (biased by 128)
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// On entry:
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// x0 -> array of 64x 16-bit coefficients
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// x1 -> 8-bit results
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// x2 = row stride for results, bytes
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function ff_put_signed_pixels_clamped_neon, export=1
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #64
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movi v4.8b, #128
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ld1 {v16.16b, v17.16b, v18.16b, v19.16b}, [x0]
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sqxtn v0.8b, v0.8h
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sqxtn v1.8b, v1.8h
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sqxtn v2.8b, v2.8h
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sqxtn v3.8b, v3.8h
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sqxtn v5.8b, v16.8h
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add v0.8b, v0.8b, v4.8b
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sqxtn v6.8b, v17.8h
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add v1.8b, v1.8b, v4.8b
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sqxtn v7.8b, v18.8h
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add v2.8b, v2.8b, v4.8b
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sqxtn v16.8b, v19.8h
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add v3.8b, v3.8b, v4.8b
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st1 {v0.8b}, [x1], x2
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add v0.8b, v5.8b, v4.8b
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st1 {v1.8b}, [x1], x2
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add v1.8b, v6.8b, v4.8b
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st1 {v2.8b}, [x1], x2
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add v2.8b, v7.8b, v4.8b
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st1 {v3.8b}, [x1], x2
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add v3.8b, v16.8b, v4.8b
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st1 {v0.8b}, [x1], x2
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st1 {v1.8b}, [x1], x2
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st1 {v2.8b}, [x1], x2
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st1 {v3.8b}, [x1]
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ret
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endfunc
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// Add 16-bit signed block coefficients to unsigned 8-bit
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// On entry:
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// x0 -> array of 64x 16-bit coefficients
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// x1 -> 8-bit input and results
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// x2 = row stride for 8-bit input and results, bytes
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function ff_add_pixels_clamped_neon, export=1
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #64
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mov x3, x1
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ld1 {v4.8b}, [x1], x2
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ld1 {v5.8b}, [x1], x2
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ld1 {v6.8b}, [x1], x2
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ld1 {v7.8b}, [x1], x2
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ld1 {v16.16b, v17.16b, v18.16b, v19.16b}, [x0]
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uaddw v0.8h, v0.8h, v4.8b
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uaddw v1.8h, v1.8h, v5.8b
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uaddw v2.8h, v2.8h, v6.8b
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ld1 {v4.8b}, [x1], x2
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uaddw v3.8h, v3.8h, v7.8b
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ld1 {v5.8b}, [x1], x2
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sqxtun v0.8b, v0.8h
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ld1 {v6.8b}, [x1], x2
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sqxtun v1.8b, v1.8h
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ld1 {v7.8b}, [x1]
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sqxtun v2.8b, v2.8h
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sqxtun v3.8b, v3.8h
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uaddw v4.8h, v16.8h, v4.8b
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st1 {v0.8b}, [x3], x2
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uaddw v0.8h, v17.8h, v5.8b
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st1 {v1.8b}, [x3], x2
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uaddw v1.8h, v18.8h, v6.8b
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st1 {v2.8b}, [x3], x2
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uaddw v2.8h, v19.8h, v7.8b
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sqxtun v4.8b, v4.8h
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sqxtun v0.8b, v0.8h
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st1 {v3.8b}, [x3], x2
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sqxtun v1.8b, v1.8h
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sqxtun v2.8b, v2.8h
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st1 {v4.8b}, [x3], x2
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st1 {v0.8b}, [x3], x2
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st1 {v1.8b}, [x3], x2
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st1 {v2.8b}, [x3]
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ret
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endfunc
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