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7b0f61a936
This changes the tests that used the internal hevc checksum to use framecrc Signed-off-by: Anton Khirnov <anton@khirnov.net> Signed-off-by: Michael Niedermayer <michaelni@gmx.at> Conflicts: tests/fate/hevc.mak tests/ref/fate/hevc-conformance-DBLK_A_SONY_3 tests/ref/fate/hevc-conformance-DBLK_B_SONY_3 tests/ref/fate/hevc-conformance-DBLK_C_SONY_3 tests/ref/fate/hevc-conformance-DELTAQP_B_SONY_3 tests/ref/fate/hevc-conformance-DELTAQP_C_SONY_3 tests/ref/fate/hevc-conformance-POC_A_Bossen_3 Merged-by: Michael Niedermayer <michaelni@gmx.at>
157 lines
5.1 KiB
Makefile
157 lines
5.1 KiB
Makefile
HEVC_SAMPLES = \
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AMP_A_Samsung_4 \
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AMP_B_Samsung_4 \
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AMVP_C_Samsung_4 \
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AMP_D_Hisilicon \
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AMP_E_Hisilicon \
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AMP_F_Hisilicon_3 \
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AMVP_A_MTK_4 \
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AMVP_B_MTK_4 \
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CAINIT_A_SHARP_4 \
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CAINIT_B_SHARP_4 \
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CAINIT_C_SHARP_3 \
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CAINIT_D_SHARP_3 \
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CAINIT_E_SHARP_3 \
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CAINIT_F_SHARP_3 \
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CAINIT_G_SHARP_3 \
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CAINIT_H_SHARP_3 \
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CIP_A_Panasonic_3 \
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cip_B_NEC_2 \
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CIP_C_Panasonic_2 \
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DBLK_A_SONY_3 \
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DBLK_B_SONY_3 \
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DBLK_C_SONY_3 \
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DBLK_D_VIXS_1 \
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DBLK_D_VIXS_2 \
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DBLK_E_VIXS_1 \
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DBLK_E_VIXS_2 \
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DBLK_F_VIXS_1 \
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DBLK_F_VIXS_2 \
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DBLK_G_VIXS_1 \
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DBLK_G_VIXS_2 \
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DELTAQP_B_SONY_3 \
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DELTAQP_C_SONY_3 \
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DSLICE_A_HHI_5 \
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DSLICE_B_HHI_5 \
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DSLICE_C_HHI_5 \
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ENTP_A_LG_2 \
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ENTP_B_LG_2 \
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ENTP_C_LG_3 \
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EXT_A_ericsson_3 \
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ipcm_A_NEC_2 \
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ipcm_B_NEC_2 \
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ipcm_C_NEC_2 \
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ipcm_D_NEC_2 \
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IPRED_A_docomo_2 \
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IPRED_B_Nokia_3 \
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IPRED_C_Mitsubishi_2 \
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LS_A_Orange_2 \
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LS_B_ORANGE_3 \
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MAXBINS_A_TI_4 \
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MAXBINS_B_TI_4 \
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MAXBINS_C_TI_4 \
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MERGE_A_TI_3 \
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MERGE_B_TI_3 \
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MERGE_C_TI_3 \
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MERGE_D_TI_3 \
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MERGE_E_TI_3 \
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MERGE_F_MTK_4 \
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MERGE_G_HHI_4 \
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MVCLIP_A_qualcomm_3 \
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MVDL1ZERO_A_docomo_3 \
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MVEDGE_A_qualcomm_3 \
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NUT_A_ericsson_4 \
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PICSIZE_A_Bossen_1 \
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PICSIZE_B_Bossen_1 \
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PICSIZE_C_Bossen_1 \
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PICSIZE_D_Bossen_1 \
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PMERGE_A_TI_3 \
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PMERGE_B_TI_3 \
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PMERGE_C_TI_3 \
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PMERGE_D_TI_3 \
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PMERGE_E_TI_3 \
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POC_A_Bossen_3 \
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PPS_A_qualcomm_7 \
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RAP_A_docomo_4 \
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PS_A_VIDYO_3 \
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PS_B_VIDYO_3 \
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RAP_B_Bossen_1 \
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RPLM_A_qualcomm_4 \
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RPLM_B_qualcomm_4 \
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RPS_A_docomo_4 \
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RPS_B_qualcomm_5 \
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RPS_C_ericsson_4 \
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RPS_D_ericsson_5 \
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RPS_E_qualcomm_5 \
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RQT_A_HHI_4 \
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RQT_B_HHI_4 \
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RQT_C_HHI_4 \
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RQT_D_HHI_4 \
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RQT_E_HHI_4 \
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RQT_F_HHI_4 \
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RQT_G_HHI_4 \
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SAO_A_MediaTek_4 \
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SAO_B_MediaTek_5 \
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SAO_C_Samsung_4 \
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SAO_D_Samsung_4 \
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SAO_E_Canon_4 \
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SAO_F_Canon_3 \
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SAO_G_Canon_3 \
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SDH_A_Orange_3 \
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SLICES_A_Rovi_3 \
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SLIST_A_Sony_4 \
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SLIST_B_Sony_8 \
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SLIST_C_Sony_3 \
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SLIST_D_Sony_9 \
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STRUCT_A_Samsung_5 \
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STRUCT_B_Samsung_4 \
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TILES_A_Cisco_2 \
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TILES_B_Cisco_1 \
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TMVP_A_MS_2 \
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TSCL_A_VIDYO_5 \
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TSCL_B_VIDYO_4 \
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TSKIP_A_MS_2 \
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WP_A_Toshiba_3 \
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WP_B_Toshiba_3 \
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WPP_A_ericsson_MAIN_2 \
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WPP_B_ericsson_MAIN_2 \
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WPP_C_ericsson_MAIN_2 \
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WPP_D_ericsson_MAIN_2 \
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WPP_E_ericsson_MAIN_2 \
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WPP_F_ericsson_MAIN_2 \
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HEVC_SAMPLES_10BIT = \
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DBLK_A_MAIN10_VIXS_2 \
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WP_A_MAIN10_Toshiba_3 \
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WP_MAIN10_B_Toshiba_3 \
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WPP_A_ericsson_MAIN10_2 \
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WPP_B_ericsson_MAIN10_2 \
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WPP_C_ericsson_MAIN10_2 \
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WPP_D_ericsson_MAIN10_2 \
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WPP_E_ericsson_MAIN10_2 \
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WPP_F_ericsson_MAIN10_2 \
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# do not pass:
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# DELTAQP_A_BRCM_4.bit -- TODO uses CRC instead of MD5
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# HRD_A_Fujitsu_2.bin -- TODO uses hash 2 ("checksum")
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# TSUNEQBD_A_MAIN10_Technicolor_2.bit (segfault)
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define FATE_HEVC_TEST
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FATE_HEVC += fate-hevc-conformance-$(1)
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fate-hevc-conformance-$(1): CMD = framecrc -vsync drop -i $(TARGET_SAMPLES)/hevc-conformance/$(1).bit
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endef
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define FATE_HEVC_TEST_10BIT
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FATE_HEVC += fate-hevc-conformance-$(1)
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fate-hevc-conformance-$(1): CMD = framecrc -vsync drop -i $(TARGET_SAMPLES)/hevc-conformance/$(1).bit -pix_fmt yuv420p10le
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endef
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$(foreach N,$(HEVC_SAMPLES),$(eval $(call FATE_HEVC_TEST,$(N))))
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$(foreach N,$(HEVC_SAMPLES_10BIT),$(eval $(call FATE_HEVC_TEST_10BIT,$(N))))
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FATE_HEVC-$(call DEMDEC, HEVC, HEVC) += $(FATE_HEVC)
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FATE_SAMPLES_AVCONV += $(FATE_HEVC-yes)
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fate-hevc: $(FATE_HEVC-yes)
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