mirror of
https://github.com/FFmpeg/FFmpeg.git
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0e52a4e434
Implements AVX2 DMVR (decoder-side motion vector refinement) SAD functions. DMVR SAD is only calculated if w >= 8, h >= 8, and w * h > 128. To reduce complexity, SAD is only calculated on even rows. This is calculated for all video bitdepths, but the values passed to the function are always 16bit (even if the original video bitdepth is 8). The AVX2 implementation uses min/max/sub. Additionally this changes parameters dx and dy from int to intptr_t. This allows dx & dy to be used as pointer offsets without needing to use movsxd. Benchmarks ( AMD 7940HS ) Before: BQTerrace_1920x1080_60_10_420_22_RA.vvc | 106.0 | Chimera_8bit_1080P_1000_frames.vvc | 204.3 | NovosobornayaSquare_1920x1080.bin | 197.3 | RitualDance_1920x1080_60_10_420_37_RA.266 | 174.0 | After: BQTerrace_1920x1080_60_10_420_22_RA.vvc | 109.3 | Chimera_8bit_1080P_1000_frames.vvc | 216.0 | NovosobornayaSquare_1920x1080.bin | 204.0| RitualDance_1920x1080_60_10_420_37_RA.266 | 181.7 | Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com> Signed-off-by: James Almer <jamrial@gmail.com>
365 lines
17 KiB
C
365 lines
17 KiB
C
/*
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* VVC DSP init for x86
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*
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* Copyright (C) 2022-2024 Nuo Mi
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* Copyright (c) 2023-2024 Wu Jianhua
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#include "libavutil/cpu.h"
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#include "libavutil/x86/cpu.h"
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#include "libavcodec/vvc/dec.h"
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#include "libavcodec/vvc/ctu.h"
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#include "libavcodec/vvc/dsp.h"
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#include "libavcodec/x86/h26x/h2656dsp.h"
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#define PUT_PROTOTYPE(name, depth, opt) \
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void ff_vvc_put_ ## name ## _ ## depth ## _##opt(int16_t *dst, const uint8_t *src, ptrdiff_t srcstride, int height, const int8_t *hf, const int8_t *vf, int width);
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#define PUT_PROTOTYPES(name, bitd, opt) \
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PUT_PROTOTYPE(name##2, bitd, opt) \
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PUT_PROTOTYPE(name##4, bitd, opt) \
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PUT_PROTOTYPE(name##8, bitd, opt) \
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PUT_PROTOTYPE(name##12, bitd, opt) \
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PUT_PROTOTYPE(name##16, bitd, opt) \
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PUT_PROTOTYPE(name##24, bitd, opt) \
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PUT_PROTOTYPE(name##32, bitd, opt) \
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PUT_PROTOTYPE(name##48, bitd, opt) \
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PUT_PROTOTYPE(name##64, bitd, opt) \
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PUT_PROTOTYPE(name##128, bitd, opt)
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#define PUT_BPC_PROTOTYPES(name, opt) \
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PUT_PROTOTYPES(name, 8, opt) \
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PUT_PROTOTYPES(name, 10, opt) \
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PUT_PROTOTYPES(name, 12, opt)
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#define PUT_TAP_PROTOTYPES(n, opt) \
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PUT_BPC_PROTOTYPES(n##tap_h, opt) \
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PUT_BPC_PROTOTYPES(n##tap_v, opt) \
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PUT_BPC_PROTOTYPES(n##tap_hv, opt)
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PUT_BPC_PROTOTYPES(pixels, sse4)
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PUT_BPC_PROTOTYPES(pixels, avx2)
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PUT_TAP_PROTOTYPES(4, sse4)
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PUT_TAP_PROTOTYPES(8, sse4)
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PUT_TAP_PROTOTYPES(4, avx2)
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PUT_TAP_PROTOTYPES(8, avx2)
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#define bf(fn, bd, opt) fn##_##bd##_##opt
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#define BF(fn, bpc, opt) fn##_##bpc##bpc_##opt
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#define AVG_BPC_PROTOTYPES(bpc, opt) \
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void BF(ff_vvc_avg, bpc, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, intptr_t width, intptr_t height, intptr_t pixel_max); \
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void BF(ff_vvc_w_avg, bpc, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, intptr_t width, intptr_t height, \
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intptr_t denom, intptr_t w0, intptr_t w1, intptr_t o0, intptr_t o1, intptr_t pixel_max);
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#define AVG_PROTOTYPES(bd, opt) \
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void bf(ff_vvc_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height); \
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void bf(ff_vvc_w_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height, \
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int denom, int w0, int w1, int o0, int o1);
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AVG_BPC_PROTOTYPES( 8, avx2)
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AVG_BPC_PROTOTYPES(16, avx2)
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AVG_PROTOTYPES( 8, avx2)
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AVG_PROTOTYPES(10, avx2)
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AVG_PROTOTYPES(12, avx2)
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#define ALF_BPC_PROTOTYPES(bpc, opt) \
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void BF(ff_vvc_alf_filter_luma, bpc, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const uint8_t *src, ptrdiff_t src_stride, ptrdiff_t width, ptrdiff_t height, \
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const int16_t *filter, const int16_t *clip, ptrdiff_t stride, ptrdiff_t vb_pos, ptrdiff_t pixel_max); \
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void BF(ff_vvc_alf_filter_chroma, bpc, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const uint8_t *src, ptrdiff_t src_stride, ptrdiff_t width, ptrdiff_t height, \
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const int16_t *filter, const int16_t *clip, ptrdiff_t stride, ptrdiff_t vb_pos, ptrdiff_t pixel_max); \
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void BF(ff_vvc_alf_classify_grad, bpc, opt)(int *gradient_sum, \
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const uint8_t *src, ptrdiff_t src_stride, intptr_t width, intptr_t height, intptr_t vb_pos); \
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void BF(ff_vvc_alf_classify, bpc, opt)(int *class_idx, int *transpose_idx, const int *gradient_sum, \
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intptr_t width, intptr_t height, intptr_t vb_pos, intptr_t bit_depth); \
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#define ALF_PROTOTYPES(bpc, bd, opt) \
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void bf(ff_vvc_alf_filter_luma, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, const uint8_t *src, ptrdiff_t src_stride, \
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int width, int height, const int16_t *filter, const int16_t *clip, const int vb_pos); \
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void bf(ff_vvc_alf_filter_chroma, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, const uint8_t *src, ptrdiff_t src_stride, \
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int width, int height, const int16_t *filter, const int16_t *clip, const int vb_pos); \
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void bf(ff_vvc_alf_classify, bd, opt)(int *class_idx, int *transpose_idx, \
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const uint8_t *src, ptrdiff_t src_stride, int width, int height, int vb_pos, int *gradient_tmp); \
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ALF_BPC_PROTOTYPES(8, avx2)
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ALF_BPC_PROTOTYPES(16, avx2)
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ALF_PROTOTYPES(8, 8, avx2)
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ALF_PROTOTYPES(16, 10, avx2)
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ALF_PROTOTYPES(16, 12, avx2)
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#if ARCH_X86_64
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#if HAVE_SSE4_EXTERNAL
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#define FW_PUT(name, depth, opt) \
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void ff_vvc_put_ ## name ## _ ## depth ## _##opt(int16_t *dst, const uint8_t *src, ptrdiff_t srcstride, \
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int height, const int8_t *hf, const int8_t *vf, int width) \
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{ \
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ff_h2656_put_## name ## _ ## depth ## _##opt(dst, 2 * MAX_PB_SIZE, src, srcstride, height, hf, vf, width); \
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}
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#define FW_PUT_TAP(fname, bitd, opt ) \
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FW_PUT(fname##4, bitd, opt ) \
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FW_PUT(fname##8, bitd, opt ) \
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FW_PUT(fname##16, bitd, opt ) \
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FW_PUT(fname##32, bitd, opt ) \
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FW_PUT(fname##64, bitd, opt ) \
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FW_PUT(fname##128, bitd, opt ) \
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#define FW_PUT_4TAP(fname, bitd, opt) \
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FW_PUT(fname ## 2, bitd, opt) \
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FW_PUT_TAP(fname, bitd, opt)
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#define FW_PUT_4TAP_SSE4(bitd) \
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FW_PUT_4TAP(pixels, bitd, sse4) \
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FW_PUT_4TAP(4tap_h, bitd, sse4) \
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FW_PUT_4TAP(4tap_v, bitd, sse4) \
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FW_PUT_4TAP(4tap_hv, bitd, sse4)
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#define FW_PUT_8TAP_SSE4(bitd) \
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FW_PUT_TAP(8tap_h, bitd, sse4) \
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FW_PUT_TAP(8tap_v, bitd, sse4) \
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FW_PUT_TAP(8tap_hv, bitd, sse4)
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#define FW_PUT_SSE4(bitd) \
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FW_PUT_4TAP_SSE4(bitd) \
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FW_PUT_8TAP_SSE4(bitd)
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FW_PUT_SSE4( 8)
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FW_PUT_SSE4(10)
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FW_PUT_SSE4(12)
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#endif
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#if HAVE_AVX2_EXTERNAL
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#define FW_PUT_TAP_AVX2(n, bitd) \
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FW_PUT(n ## tap_h32, bitd, avx2) \
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FW_PUT(n ## tap_h64, bitd, avx2) \
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FW_PUT(n ## tap_h128, bitd, avx2) \
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FW_PUT(n ## tap_v32, bitd, avx2) \
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FW_PUT(n ## tap_v64, bitd, avx2) \
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FW_PUT(n ## tap_v128, bitd, avx2)
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#define FW_PUT_AVX2(bitd) \
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FW_PUT(pixels32, bitd, avx2) \
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FW_PUT(pixels64, bitd, avx2) \
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FW_PUT(pixels128, bitd, avx2) \
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FW_PUT_TAP_AVX2(4, bitd) \
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FW_PUT_TAP_AVX2(8, bitd) \
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FW_PUT_AVX2( 8)
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FW_PUT_AVX2(10)
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FW_PUT_AVX2(12)
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#define FW_PUT_TAP_16BPC_AVX2(n, bitd) \
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FW_PUT(n ## tap_h16, bitd, avx2) \
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FW_PUT(n ## tap_v16, bitd, avx2) \
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FW_PUT(n ## tap_hv16, bitd, avx2) \
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FW_PUT(n ## tap_hv32, bitd, avx2) \
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FW_PUT(n ## tap_hv64, bitd, avx2) \
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FW_PUT(n ## tap_hv128, bitd, avx2)
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#define FW_PUT_16BPC_AVX2(bitd) \
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FW_PUT(pixels16, bitd, avx2) \
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FW_PUT_TAP_16BPC_AVX2(4, bitd) \
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FW_PUT_TAP_16BPC_AVX2(8, bitd)
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FW_PUT_16BPC_AVX2(10)
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FW_PUT_16BPC_AVX2(12)
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#define AVG_FUNCS(bpc, bd, opt) \
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void bf(ff_vvc_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height) \
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{ \
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BF(ff_vvc_avg, bpc, opt)(dst, dst_stride, src0, src1, width, height, (1 << bd) - 1); \
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} \
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void bf(ff_vvc_w_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height, \
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int denom, int w0, int w1, int o0, int o1) \
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{ \
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BF(ff_vvc_w_avg, bpc, opt)(dst, dst_stride, src0, src1, width, height, \
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denom, w0, w1, o0, o1, (1 << bd) - 1); \
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}
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AVG_FUNCS(8, 8, avx2)
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AVG_FUNCS(16, 10, avx2)
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AVG_FUNCS(16, 12, avx2)
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#define ALF_FUNCS(bpc, bd, opt) \
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void bf(ff_vvc_alf_filter_luma, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, const uint8_t *src, ptrdiff_t src_stride, \
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int width, int height, const int16_t *filter, const int16_t *clip, const int vb_pos) \
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{ \
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const int param_stride = (width >> 2) * ALF_NUM_COEFF_LUMA; \
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BF(ff_vvc_alf_filter_luma, bpc, opt)(dst, dst_stride, src, src_stride, width, height, \
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filter, clip, param_stride, vb_pos, (1 << bd) - 1); \
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} \
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void bf(ff_vvc_alf_filter_chroma, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, const uint8_t *src, ptrdiff_t src_stride, \
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int width, int height, const int16_t *filter, const int16_t *clip, const int vb_pos) \
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{ \
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BF(ff_vvc_alf_filter_chroma, bpc, opt)(dst, dst_stride, src, src_stride, width, height, \
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filter, clip, 0, vb_pos,(1 << bd) - 1); \
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} \
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void bf(ff_vvc_alf_classify, bd, opt)(int *class_idx, int *transpose_idx, \
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const uint8_t *src, ptrdiff_t src_stride, int width, int height, int vb_pos, int *gradient_tmp) \
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{ \
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BF(ff_vvc_alf_classify_grad, bpc, opt)(gradient_tmp, src, src_stride, width, height, vb_pos); \
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BF(ff_vvc_alf_classify, bpc, opt)(class_idx, transpose_idx, gradient_tmp, width, height, vb_pos, bd); \
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} \
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ALF_FUNCS(8, 8, avx2)
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ALF_FUNCS(16, 10, avx2)
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ALF_FUNCS(16, 12, avx2)
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#endif
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#define PEL_LINK(dst, C, W, idx1, idx2, name, D, opt) \
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dst[C][W][idx1][idx2] = ff_vvc_put_## name ## _ ## D ## _##opt; \
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dst ## _uni[C][W][idx1][idx2] = ff_h2656_put_uni_ ## name ## _ ## D ## _##opt; \
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#define MC_TAP_LINKS(pointer, C, my, mx, fname, bitd, opt ) \
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PEL_LINK(pointer, C, 1, my , mx , fname##4 , bitd, opt ); \
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PEL_LINK(pointer, C, 2, my , mx , fname##8 , bitd, opt ); \
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PEL_LINK(pointer, C, 3, my , mx , fname##16, bitd, opt ); \
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PEL_LINK(pointer, C, 4, my , mx , fname##32, bitd, opt ); \
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PEL_LINK(pointer, C, 5, my , mx , fname##64, bitd, opt ); \
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PEL_LINK(pointer, C, 6, my , mx , fname##128, bitd, opt );
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#define MC_8TAP_LINKS(pointer, my, mx, fname, bitd, opt) \
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MC_TAP_LINKS(pointer, LUMA, my, mx, fname, bitd, opt)
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#define MC_8TAP_LINKS_SSE4(bd) \
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MC_8TAP_LINKS(c->inter.put, 0, 0, pixels, bd, sse4); \
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MC_8TAP_LINKS(c->inter.put, 0, 1, 8tap_h, bd, sse4); \
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MC_8TAP_LINKS(c->inter.put, 1, 0, 8tap_v, bd, sse4); \
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MC_8TAP_LINKS(c->inter.put, 1, 1, 8tap_hv, bd, sse4)
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#define MC_4TAP_LINKS(pointer, my, mx, fname, bitd, opt) \
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PEL_LINK(pointer, CHROMA, 0, my , mx , fname##2 , bitd, opt ); \
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MC_TAP_LINKS(pointer, CHROMA, my, mx, fname, bitd, opt) \
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#define MC_4TAP_LINKS_SSE4(bd) \
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MC_4TAP_LINKS(c->inter.put, 0, 0, pixels, bd, sse4); \
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MC_4TAP_LINKS(c->inter.put, 0, 1, 4tap_h, bd, sse4); \
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MC_4TAP_LINKS(c->inter.put, 1, 0, 4tap_v, bd, sse4); \
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MC_4TAP_LINKS(c->inter.put, 1, 1, 4tap_hv, bd, sse4)
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#define MC_LINK_SSE4(bd) \
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MC_4TAP_LINKS_SSE4(bd) \
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MC_8TAP_LINKS_SSE4(bd)
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#define MC_TAP_LINKS_AVX2(C,tap,bd) do { \
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PEL_LINK(c->inter.put, C, 4, 0, 0, pixels32, bd, avx2) \
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PEL_LINK(c->inter.put, C, 5, 0, 0, pixels64, bd, avx2) \
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PEL_LINK(c->inter.put, C, 6, 0, 0, pixels128, bd, avx2) \
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PEL_LINK(c->inter.put, C, 4, 0, 1, tap##tap_h32, bd, avx2) \
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PEL_LINK(c->inter.put, C, 5, 0, 1, tap##tap_h64, bd, avx2) \
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PEL_LINK(c->inter.put, C, 6, 0, 1, tap##tap_h128, bd, avx2) \
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PEL_LINK(c->inter.put, C, 4, 1, 0, tap##tap_v32, bd, avx2) \
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PEL_LINK(c->inter.put, C, 5, 1, 0, tap##tap_v64, bd, avx2) \
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PEL_LINK(c->inter.put, C, 6, 1, 0, tap##tap_v128, bd, avx2) \
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} while (0)
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#define MC_LINKS_AVX2(bd) \
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MC_TAP_LINKS_AVX2(LUMA, 8, bd); \
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MC_TAP_LINKS_AVX2(CHROMA, 4, bd);
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#define MC_TAP_LINKS_16BPC_AVX2(C, tap, bd) do { \
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PEL_LINK(c->inter.put, C, 3, 0, 0, pixels16, bd, avx2) \
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PEL_LINK(c->inter.put, C, 3, 0, 1, tap##tap_h16, bd, avx2) \
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PEL_LINK(c->inter.put, C, 3, 1, 0, tap##tap_v16, bd, avx2) \
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PEL_LINK(c->inter.put, C, 3, 1, 1, tap##tap_hv16, bd, avx2) \
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PEL_LINK(c->inter.put, C, 4, 1, 1, tap##tap_hv32, bd, avx2) \
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PEL_LINK(c->inter.put, C, 5, 1, 1, tap##tap_hv64, bd, avx2) \
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PEL_LINK(c->inter.put, C, 6, 1, 1, tap##tap_hv128, bd, avx2) \
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} while (0)
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#define MC_LINKS_16BPC_AVX2(bd) \
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MC_TAP_LINKS_16BPC_AVX2(LUMA, 8, bd); \
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MC_TAP_LINKS_16BPC_AVX2(CHROMA, 4, bd);
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#define AVG_INIT(bd, opt) do { \
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c->inter.avg = bf(ff_vvc_avg, bd, opt); \
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c->inter.w_avg = bf(ff_vvc_w_avg, bd, opt); \
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} while (0)
|
|
|
|
#define ALF_INIT(bd) do { \
|
|
c->alf.filter[LUMA] = ff_vvc_alf_filter_luma_##bd##_avx2; \
|
|
c->alf.filter[CHROMA] = ff_vvc_alf_filter_chroma_##bd##_avx2; \
|
|
c->alf.classify = ff_vvc_alf_classify_##bd##_avx2; \
|
|
} while (0)
|
|
|
|
int ff_vvc_sad_avx2(const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h);
|
|
#define SAD_INIT() c->inter.sad = ff_vvc_sad_avx2
|
|
#endif
|
|
|
|
void ff_vvc_dsp_init_x86(VVCDSPContext *const c, const int bd)
|
|
{
|
|
#if ARCH_X86_64
|
|
const int cpu_flags = av_get_cpu_flags();
|
|
|
|
switch (bd) {
|
|
case 8:
|
|
if (EXTERNAL_SSE4(cpu_flags)) {
|
|
MC_LINK_SSE4(8);
|
|
}
|
|
if (EXTERNAL_AVX2_FAST(cpu_flags)) {
|
|
ALF_INIT(8);
|
|
AVG_INIT(8, avx2);
|
|
MC_LINKS_AVX2(8);
|
|
SAD_INIT();
|
|
}
|
|
break;
|
|
case 10:
|
|
if (EXTERNAL_SSE4(cpu_flags)) {
|
|
MC_LINK_SSE4(10);
|
|
}
|
|
if (EXTERNAL_AVX2_FAST(cpu_flags)) {
|
|
ALF_INIT(10);
|
|
AVG_INIT(10, avx2);
|
|
MC_LINKS_AVX2(10);
|
|
MC_LINKS_16BPC_AVX2(10);
|
|
SAD_INIT();
|
|
}
|
|
break;
|
|
case 12:
|
|
if (EXTERNAL_SSE4(cpu_flags)) {
|
|
MC_LINK_SSE4(12);
|
|
}
|
|
if (EXTERNAL_AVX2_FAST(cpu_flags)) {
|
|
ALF_INIT(12);
|
|
AVG_INIT(12, avx2);
|
|
MC_LINKS_AVX2(12);
|
|
MC_LINKS_16BPC_AVX2(12);
|
|
SAD_INIT();
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
#endif
|
|
}
|