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https://github.com/FFmpeg/FFmpeg.git
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130c33af35
* commit 'b23bc95920e2f10b9621857e829c45b064f356c0': x86: dca: Add missing multiple inclusion guards Merged-by: Michael Niedermayer <michaelni@gmx.at>
61 lines
2.1 KiB
C
61 lines
2.1 KiB
C
/*
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* Copyright (c) 2012-2014 Christophe Gisquet <christophe.gisquet@gmail.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVCODEC_X86_DCA_H
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#define AVCODEC_X86_DCA_H
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#include "config.h"
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#if ARCH_X86_64 && HAVE_SSE2_INLINE
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# include "libavutil/x86/asm.h"
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# include "libavutil/mem.h"
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#include "libavcodec/dcadsp.h"
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# define int8x8_fmul_int32 int8x8_fmul_int32
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static inline void int8x8_fmul_int32(av_unused DCADSPContext *dsp,
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float *dst, const int8_t *src, int scale)
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{
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DECLARE_ALIGNED(16, static const uint32_t, inverse16) = 0x3D800000;
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__asm__ volatile (
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"cvtsi2ss %2, %%xmm0 \n\t"
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"mulss %3, %%xmm0 \n\t"
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"movq (%1), %%xmm1 \n\t"
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"punpcklbw %%xmm1, %%xmm1 \n\t"
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"movaps %%xmm1, %%xmm2 \n\t"
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"punpcklwd %%xmm1, %%xmm1 \n\t"
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"punpckhwd %%xmm2, %%xmm2 \n\t"
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"psrad $24, %%xmm1 \n\t"
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"psrad $24, %%xmm2 \n\t"
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"shufps $0, %%xmm0, %%xmm0 \n\t"
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"cvtdq2ps %%xmm1, %%xmm1 \n\t"
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"cvtdq2ps %%xmm2, %%xmm2 \n\t"
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"mulps %%xmm0, %%xmm1 \n\t"
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"mulps %%xmm0, %%xmm2 \n\t"
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"movaps %%xmm1, 0(%0) \n\t"
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"movaps %%xmm2, 16(%0) \n\t"
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:: "r"(dst), "r"(src), "m"(scale), "m"(inverse16)
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XMM_CLOBBERS_ONLY("xmm0", "xmm1", "xmm2")
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);
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}
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#endif /* ARCH_X86_64 && HAVE_SSE2_INLINE */
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#endif /* AVCODEC_X86_DCA_H */
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