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89c8eaa321
* commit '637606de2d2e0af0a9fa2f23f943765d7d7c5cd5': configure: arm: make _inline arch ext symbols depend on inline_asm arm: use HAVE*_INLINE/EXTERNAL macros for conditional compilation Conflicts: configure libavcodec/arm/dca.h Merged-by: Michael Niedermayer <michaelni@gmx.at>
122 lines
4.1 KiB
C
122 lines
4.1 KiB
C
/*
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* Copyright (C) 2010 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVCODEC_ARM_VP56_ARITH_H
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#define AVCODEC_ARM_VP56_ARITH_H
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#if CONFIG_THUMB
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# define A(x)
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# define T(x) x
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#else
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# define A(x) x
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# define T(x)
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#endif
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#if CONFIG_THUMB || defined __clang__
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# define L(x)
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# define U(x) x
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#else
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# define L(x) x
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# define U(x)
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#endif
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#if HAVE_ARMV6_INLINE
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#define vp56_rac_get_prob vp56_rac_get_prob_armv6
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static inline int vp56_rac_get_prob_armv6(VP56RangeCoder *c, int pr)
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{
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unsigned shift = ff_vp56_norm_shift[c->high];
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unsigned code_word = c->code_word << shift;
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unsigned high = c->high << shift;
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unsigned bit;
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__asm__ ("adds %3, %3, %0 \n"
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"itt cs \n"
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"cmpcs %7, %4 \n"
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L("ldrcsh %2, [%4], #2 \n")
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U("ldrhcs %2, [%4], #2 \n")
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"rsb %0, %6, #256 \n"
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"smlabb %0, %5, %6, %0 \n"
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T("itttt cs \n")
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"rev16cs %2, %2 \n"
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T("lslcs %2, %2, %3 \n")
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T("orrcs %1, %1, %2 \n")
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A("orrcs %1, %1, %2, lsl %3 \n")
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"subcs %3, %3, #16 \n"
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"lsr %0, %0, #8 \n"
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"cmp %1, %0, lsl #16 \n"
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"ittte ge \n"
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"subge %1, %1, %0, lsl #16 \n"
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"subge %0, %5, %0 \n"
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"movge %2, #1 \n"
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"movlt %2, #0 \n"
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: "=&r"(c->high), "=&r"(c->code_word), "=&r"(bit),
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"+&r"(c->bits), "+&r"(c->buffer)
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: "r"(high), "r"(pr), "r"(c->end - 1),
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"0"(shift), "1"(code_word)
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: "cc");
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return bit;
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}
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#define vp56_rac_get_prob_branchy vp56_rac_get_prob_branchy_armv6
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static inline int vp56_rac_get_prob_branchy_armv6(VP56RangeCoder *c, int pr)
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{
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unsigned shift = ff_vp56_norm_shift[c->high];
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unsigned code_word = c->code_word << shift;
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unsigned high = c->high << shift;
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unsigned low;
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unsigned tmp;
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__asm__ ("adds %3, %3, %0 \n"
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"itt cs \n"
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"cmpcs %7, %4 \n"
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L("ldrcsh %2, [%4], #2 \n")
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U("ldrhcs %2, [%4], #2 \n")
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"rsb %0, %6, #256 \n"
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"smlabb %0, %5, %6, %0 \n"
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T("itttt cs \n")
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"rev16cs %2, %2 \n"
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T("lslcs %2, %2, %3 \n")
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T("orrcs %1, %1, %2 \n")
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A("orrcs %1, %1, %2, lsl %3 \n")
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"subcs %3, %3, #16 \n"
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"lsr %0, %0, #8 \n"
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"lsl %2, %0, #16 \n"
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: "=&r"(low), "+&r"(code_word), "=&r"(tmp),
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"+&r"(c->bits), "+&r"(c->buffer)
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: "r"(high), "r"(pr), "r"(c->end - 1), "0"(shift)
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: "cc");
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if (code_word >= tmp) {
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c->high = high - low;
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c->code_word = code_word - tmp;
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return 1;
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}
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c->high = low;
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c->code_word = code_word;
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return 0;
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}
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#endif
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#endif /* AVCODEC_ARM_VP56_ARITH_H */
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