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f43079e11c
This work is sponsored by, and copyright, Google.
These are ported from the ARM version; thanks to the larger
amount of registers available, we can do the 16x16 and 32x32
transforms in slices 8 pixels wide instead of 4. This gives
a speedup of around 1.4x compared to the 32 bit version.
The fact that aarch64 doesn't have the same d/q register
aliasing makes some of the macros quite a bit simpler as well.
Examples of runtimes vs the 32 bit version, on a Cortex A53:
ARM AArch64
vp9_inv_adst_adst_4x4_add_neon: 90.0 87.7
vp9_inv_adst_adst_8x8_add_neon: 400.0 354.7
vp9_inv_adst_adst_16x16_add_neon: 2526.5 1827.2
vp9_inv_dct_dct_4x4_add_neon: 74.0 72.7
vp9_inv_dct_dct_8x8_add_neon: 271.0 256.7
vp9_inv_dct_dct_16x16_add_neon: 1960.7 1372.7
vp9_inv_dct_dct_32x32_add_neon: 11988.9 8088.3
vp9_inv_wht_wht_4x4_add_neon: 63.0 57.7
The speedup vs C code (2-4x) is smaller than in the 32 bit case,
mostly because the C code ends up significantly faster (around
1.6x faster, with GCC 5.4) when built for aarch64.
Examples of runtimes vs C on a Cortex A57 (for a slightly older version
of the patch):
A57 gcc-5.3 neon
vp9_inv_adst_adst_4x4_add_neon: 152.2 60.0
vp9_inv_adst_adst_8x8_add_neon: 948.2 288.0
vp9_inv_adst_adst_16x16_add_neon: 4830.4 1380.5
vp9_inv_dct_dct_4x4_add_neon: 153.0 58.6
vp9_inv_dct_dct_8x8_add_neon: 789.2 180.2
vp9_inv_dct_dct_16x16_add_neon: 3639.6 917.1
vp9_inv_dct_dct_32x32_add_neon: 20462.1 4985.0
vp9_inv_wht_wht_4x4_add_neon: 91.0 49.8
The asm is around factor 3-4 faster than C on the cortex-a57 and the asm
is around 30-50% faster on the a57 compared to the a53.
This is an adapted cherry-pick from libav commit
3c9546dfaf
.
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
209 lines
7.6 KiB
C
209 lines
7.6 KiB
C
/*
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* Copyright (c) 2016 Google Inc.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include "libavutil/attributes.h"
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#include "libavutil/aarch64/cpu.h"
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#include "libavcodec/vp9dsp.h"
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#define declare_fpel(type, sz) \
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void ff_vp9_##type##sz##_neon(uint8_t *dst, ptrdiff_t dst_stride, \
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const uint8_t *src, ptrdiff_t src_stride, \
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int h, int mx, int my)
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#define declare_copy_avg(sz) \
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declare_fpel(copy, sz); \
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declare_fpel(avg , sz)
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#define decl_mc_func(op, filter, dir, sz) \
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void ff_vp9_##op##_##filter##sz##_##dir##_neon(uint8_t *dst, ptrdiff_t dst_stride, \
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const uint8_t *src, ptrdiff_t src_stride, \
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int h, int mx, int my)
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#define define_8tap_2d_fn(op, filter, sz) \
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static void op##_##filter##sz##_hv_neon(uint8_t *dst, ptrdiff_t dst_stride, \
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const uint8_t *src, ptrdiff_t src_stride, \
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int h, int mx, int my) \
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{ \
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LOCAL_ALIGNED_16(uint8_t, temp, [((1 + (sz < 64)) * sz + 8) * sz]); \
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/* We only need h + 7 lines, but the horizontal filter assumes an \
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* even number of rows, so filter h + 8 lines here. */ \
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ff_vp9_put_##filter##sz##_h_neon(temp, sz, \
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src - 3 * src_stride, src_stride, \
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h + 8, mx, 0); \
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ff_vp9_##op##_##filter##sz##_v_neon(dst, dst_stride, \
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temp + 3 * sz, sz, \
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h, 0, my); \
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}
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#define decl_filter_funcs(op, dir, sz) \
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decl_mc_func(op, regular, dir, sz); \
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decl_mc_func(op, sharp, dir, sz); \
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decl_mc_func(op, smooth, dir, sz)
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#define decl_mc_funcs(sz) \
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decl_filter_funcs(put, h, sz); \
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decl_filter_funcs(avg, h, sz); \
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decl_filter_funcs(put, v, sz); \
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decl_filter_funcs(avg, v, sz); \
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decl_filter_funcs(put, hv, sz); \
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decl_filter_funcs(avg, hv, sz)
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#define ff_vp9_copy32_neon ff_vp9_copy32_aarch64
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#define ff_vp9_copy64_neon ff_vp9_copy64_aarch64
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declare_copy_avg(64);
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declare_copy_avg(32);
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declare_copy_avg(16);
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declare_copy_avg(8);
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declare_copy_avg(4);
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decl_mc_funcs(64);
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decl_mc_funcs(32);
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decl_mc_funcs(16);
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decl_mc_funcs(8);
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decl_mc_funcs(4);
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#define define_8tap_2d_funcs(sz) \
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define_8tap_2d_fn(put, regular, sz) \
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define_8tap_2d_fn(put, sharp, sz) \
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define_8tap_2d_fn(put, smooth, sz) \
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define_8tap_2d_fn(avg, regular, sz) \
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define_8tap_2d_fn(avg, sharp, sz) \
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define_8tap_2d_fn(avg, smooth, sz)
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define_8tap_2d_funcs(64)
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define_8tap_2d_funcs(32)
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define_8tap_2d_funcs(16)
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define_8tap_2d_funcs(8)
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define_8tap_2d_funcs(4)
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static av_cold void vp9dsp_mc_init_aarch64(VP9DSPContext *dsp, int bpp)
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{
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int cpu_flags = av_get_cpu_flags();
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if (bpp != 8)
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return;
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#define init_fpel(idx1, idx2, sz, type, suffix) \
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dsp->mc[idx1][FILTER_8TAP_SMOOTH ][idx2][0][0] = \
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dsp->mc[idx1][FILTER_8TAP_REGULAR][idx2][0][0] = \
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dsp->mc[idx1][FILTER_8TAP_SHARP ][idx2][0][0] = \
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dsp->mc[idx1][FILTER_BILINEAR ][idx2][0][0] = ff_vp9_##type##sz##suffix
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#define init_copy(idx, sz, suffix) \
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init_fpel(idx, 0, sz, copy, suffix)
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#define init_avg(idx, sz, suffix) \
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init_fpel(idx, 1, sz, avg, suffix)
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#define init_copy_avg(idx, sz) \
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init_copy(idx, sz, _neon); \
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init_avg (idx, sz, _neon)
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if (have_armv8(cpu_flags)) {
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init_copy(0, 64, _aarch64);
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init_copy(1, 32, _aarch64);
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}
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if (have_neon(cpu_flags)) {
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#define init_mc_func(idx1, idx2, op, filter, fname, dir, mx, my, sz, pfx) \
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dsp->mc[idx1][filter][idx2][mx][my] = pfx##op##_##fname##sz##_##dir##_neon
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#define init_mc_funcs(idx, dir, mx, my, sz, pfx) \
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init_mc_func(idx, 0, put, FILTER_8TAP_REGULAR, regular, dir, mx, my, sz, pfx); \
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init_mc_func(idx, 0, put, FILTER_8TAP_SHARP, sharp, dir, mx, my, sz, pfx); \
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init_mc_func(idx, 0, put, FILTER_8TAP_SMOOTH, smooth, dir, mx, my, sz, pfx); \
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init_mc_func(idx, 1, avg, FILTER_8TAP_REGULAR, regular, dir, mx, my, sz, pfx); \
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init_mc_func(idx, 1, avg, FILTER_8TAP_SHARP, sharp, dir, mx, my, sz, pfx); \
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init_mc_func(idx, 1, avg, FILTER_8TAP_SMOOTH, smooth, dir, mx, my, sz, pfx)
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#define init_mc_funcs_dirs(idx, sz) \
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init_mc_funcs(idx, h, 1, 0, sz, ff_vp9_); \
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init_mc_funcs(idx, v, 0, 1, sz, ff_vp9_); \
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init_mc_funcs(idx, hv, 1, 1, sz,)
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init_avg(0, 64, _neon);
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init_avg(1, 32, _neon);
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init_copy_avg(2, 16);
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init_copy_avg(3, 8);
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init_copy_avg(4, 4);
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init_mc_funcs_dirs(0, 64);
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init_mc_funcs_dirs(1, 32);
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init_mc_funcs_dirs(2, 16);
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init_mc_funcs_dirs(3, 8);
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init_mc_funcs_dirs(4, 4);
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}
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}
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#define define_itxfm(type_a, type_b, sz) \
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void ff_vp9_##type_a##_##type_b##_##sz##x##sz##_add_neon(uint8_t *_dst, \
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ptrdiff_t stride, \
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int16_t *_block, int eob)
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#define define_itxfm_funcs(sz) \
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define_itxfm(idct, idct, sz); \
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define_itxfm(iadst, idct, sz); \
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define_itxfm(idct, iadst, sz); \
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define_itxfm(iadst, iadst, sz)
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define_itxfm_funcs(4);
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define_itxfm_funcs(8);
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define_itxfm_funcs(16);
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define_itxfm(idct, idct, 32);
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define_itxfm(iwht, iwht, 4);
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static av_cold void vp9dsp_itxfm_init_aarch64(VP9DSPContext *dsp, int bpp)
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{
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int cpu_flags = av_get_cpu_flags();
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if (bpp != 8)
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return;
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if (have_neon(cpu_flags)) {
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#define init_itxfm(tx, sz) \
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dsp->itxfm_add[tx][DCT_DCT] = ff_vp9_idct_idct_##sz##_add_neon; \
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dsp->itxfm_add[tx][DCT_ADST] = ff_vp9_iadst_idct_##sz##_add_neon; \
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dsp->itxfm_add[tx][ADST_DCT] = ff_vp9_idct_iadst_##sz##_add_neon; \
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dsp->itxfm_add[tx][ADST_ADST] = ff_vp9_iadst_iadst_##sz##_add_neon
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#define init_idct(tx, nm) \
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dsp->itxfm_add[tx][DCT_DCT] = \
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dsp->itxfm_add[tx][ADST_DCT] = \
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dsp->itxfm_add[tx][DCT_ADST] = \
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dsp->itxfm_add[tx][ADST_ADST] = ff_vp9_##nm##_add_neon
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init_itxfm(TX_4X4, 4x4);
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init_itxfm(TX_8X8, 8x8);
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init_itxfm(TX_16X16, 16x16);
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init_idct(TX_32X32, idct_idct_32x32);
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init_idct(4, iwht_iwht_4x4);
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}
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}
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av_cold void ff_vp9dsp_init_aarch64(VP9DSPContext *dsp, int bpp)
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{
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vp9dsp_mc_init_aarch64(dsp, bpp);
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vp9dsp_itxfm_init_aarch64(dsp, bpp);
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}
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