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5a153604c9
* qatar/master: Fix FSF address copy paste error in some license headers. Add an aac sample which uses LTP to fate-aac. DUPLICATE [PATCH] Update pixdesc_be fate refs after adding 9/10bit YUV420P formats. arm: properly mark external symbol call Conflicts: libavcodec/x86/ac3dsp.asm libavcodec/x86/deinterlace.asm libavcodec/x86/dsputil_yasm.asm libavcodec/x86/dsputilenc_yasm.asm libavcodec/x86/fft_mmx.asm libavcodec/x86/fmtconvert.asm libavcodec/x86/h264_chromamc.asm libavcodec/x86/h264_deblock.asm libavcodec/x86/h264_idct.asm libavcodec/x86/h264_intrapred.asm libavcodec/x86/h264_weight.asm libavcodec/x86/vc1dsp_yasm.asm libavcodec/x86/vp3dsp.asm libavcodec/x86/vp56dsp.asm libavcodec/x86/vp8dsp.asm libavcodec/x86/x86util.asm libswscale/ppc/swscale_template.c Merged-by: Michael Niedermayer <michaelni@gmx.at>
296 lines
7.8 KiB
NASM
296 lines
7.8 KiB
NASM
;*****************************************************************************
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;* x86-optimized AC-3 DSP utils
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;* Copyright (c) 2011 Justin Ruggles
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "x86inc.asm"
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%include "x86util.asm"
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SECTION_RODATA
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; 16777216.0f - used in ff_float_to_fixed24()
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pf_1_24: times 4 dd 0x4B800000
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SECTION .text
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;-----------------------------------------------------------------------------
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; void ff_ac3_exponent_min(uint8_t *exp, int num_reuse_blocks, int nb_coefs)
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;-----------------------------------------------------------------------------
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%macro AC3_EXPONENT_MIN 1
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cglobal ac3_exponent_min_%1, 3,4,2, exp, reuse_blks, expn, offset
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shl reuse_blksq, 8
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jz .end
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LOOP_ALIGN
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.nextexp:
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mov offsetq, reuse_blksq
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mova m0, [expq+offsetq]
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sub offsetq, 256
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LOOP_ALIGN
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.nextblk:
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PMINUB m0, [expq+offsetq], m1
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sub offsetq, 256
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jae .nextblk
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mova [expq], m0
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add expq, mmsize
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sub expnq, mmsize
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jg .nextexp
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.end:
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REP_RET
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%endmacro
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%define PMINUB PMINUB_MMX
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%define LOOP_ALIGN
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INIT_MMX
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AC3_EXPONENT_MIN mmx
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%ifdef HAVE_MMX2
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%define PMINUB PMINUB_MMXEXT
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%define LOOP_ALIGN ALIGN 16
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AC3_EXPONENT_MIN mmxext
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%endif
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%ifdef HAVE_SSE
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INIT_XMM
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AC3_EXPONENT_MIN sse2
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%endif
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%undef PMINUB
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%undef LOOP_ALIGN
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;-----------------------------------------------------------------------------
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; int ff_ac3_max_msb_abs_int16(const int16_t *src, int len)
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;
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; This function uses 2 different methods to calculate a valid result.
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; 1) logical 'or' of abs of each element
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; This is used for ssse3 because of the pabsw instruction.
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; It is also used for mmx because of the lack of min/max instructions.
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; 2) calculate min/max for the array, then or(abs(min),abs(max))
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; This is used for mmxext and sse2 because they have pminsw/pmaxsw.
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;-----------------------------------------------------------------------------
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%macro AC3_MAX_MSB_ABS_INT16 2
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cglobal ac3_max_msb_abs_int16_%1, 2,2,5, src, len
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pxor m2, m2
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pxor m3, m3
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.loop:
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%ifidn %2, min_max
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mova m0, [srcq]
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mova m1, [srcq+mmsize]
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pminsw m2, m0
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pminsw m2, m1
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pmaxsw m3, m0
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pmaxsw m3, m1
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%else ; or_abs
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%ifidn %1, mmx
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mova m0, [srcq]
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mova m1, [srcq+mmsize]
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ABS2 m0, m1, m3, m4
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%else ; ssse3
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; using memory args is faster for ssse3
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pabsw m0, [srcq]
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pabsw m1, [srcq+mmsize]
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%endif
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por m2, m0
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por m2, m1
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%endif
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add srcq, mmsize*2
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sub lend, mmsize
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ja .loop
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%ifidn %2, min_max
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ABS2 m2, m3, m0, m1
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por m2, m3
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%endif
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%ifidn mmsize, 16
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movhlps m0, m2
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por m2, m0
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%endif
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PSHUFLW m0, m2, 0xe
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por m2, m0
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PSHUFLW m0, m2, 0x1
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por m2, m0
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movd eax, m2
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and eax, 0xFFFF
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RET
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%endmacro
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INIT_MMX
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%define ABS2 ABS2_MMX
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%define PSHUFLW pshufw
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AC3_MAX_MSB_ABS_INT16 mmx, or_abs
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%define ABS2 ABS2_MMX2
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AC3_MAX_MSB_ABS_INT16 mmxext, min_max
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INIT_XMM
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%define PSHUFLW pshuflw
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AC3_MAX_MSB_ABS_INT16 sse2, min_max
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%define ABS2 ABS2_SSSE3
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AC3_MAX_MSB_ABS_INT16 ssse3, or_abs
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;-----------------------------------------------------------------------------
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; macro used for ff_ac3_lshift_int16() and ff_ac3_rshift_int32()
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;-----------------------------------------------------------------------------
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%macro AC3_SHIFT 4 ; l/r, 16/32, shift instruction, instruction set
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cglobal ac3_%1shift_int%2_%4, 3,3,5, src, len, shift
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movd m0, shiftd
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.loop:
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mova m1, [srcq ]
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mova m2, [srcq+mmsize ]
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mova m3, [srcq+mmsize*2]
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mova m4, [srcq+mmsize*3]
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%3 m1, m0
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%3 m2, m0
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%3 m3, m0
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%3 m4, m0
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mova [srcq ], m1
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mova [srcq+mmsize ], m2
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mova [srcq+mmsize*2], m3
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mova [srcq+mmsize*3], m4
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add srcq, mmsize*4
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sub lend, mmsize*32/%2
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ja .loop
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.end:
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REP_RET
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%endmacro
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;-----------------------------------------------------------------------------
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; void ff_ac3_lshift_int16(int16_t *src, unsigned int len, unsigned int shift)
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;-----------------------------------------------------------------------------
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INIT_MMX
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AC3_SHIFT l, 16, psllw, mmx
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INIT_XMM
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AC3_SHIFT l, 16, psllw, sse2
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;-----------------------------------------------------------------------------
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; void ff_ac3_rshift_int32(int32_t *src, unsigned int len, unsigned int shift)
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;-----------------------------------------------------------------------------
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INIT_MMX
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AC3_SHIFT r, 32, psrad, mmx
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INIT_XMM
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AC3_SHIFT r, 32, psrad, sse2
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;-----------------------------------------------------------------------------
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; void ff_float_to_fixed24(int32_t *dst, const float *src, unsigned int len)
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;-----------------------------------------------------------------------------
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; The 3DNow! version is not bit-identical because pf2id uses truncation rather
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; than round-to-nearest.
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INIT_MMX
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cglobal float_to_fixed24_3dnow, 3,3,0, dst, src, len
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movq m0, [pf_1_24]
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.loop:
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movq m1, [srcq ]
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movq m2, [srcq+8 ]
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movq m3, [srcq+16]
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movq m4, [srcq+24]
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pfmul m1, m0
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pfmul m2, m0
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pfmul m3, m0
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pfmul m4, m0
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pf2id m1, m1
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pf2id m2, m2
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pf2id m3, m3
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pf2id m4, m4
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movq [dstq ], m1
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movq [dstq+8 ], m2
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movq [dstq+16], m3
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movq [dstq+24], m4
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add srcq, 32
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add dstq, 32
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sub lend, 8
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ja .loop
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REP_RET
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INIT_XMM
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cglobal float_to_fixed24_sse, 3,3,3, dst, src, len
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movaps m0, [pf_1_24]
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.loop:
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movaps m1, [srcq ]
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movaps m2, [srcq+16]
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mulps m1, m0
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mulps m2, m0
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cvtps2pi mm0, m1
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movhlps m1, m1
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cvtps2pi mm1, m1
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cvtps2pi mm2, m2
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movhlps m2, m2
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cvtps2pi mm3, m2
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movq [dstq ], mm0
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movq [dstq+ 8], mm1
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movq [dstq+16], mm2
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movq [dstq+24], mm3
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add srcq, 32
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add dstq, 32
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sub lend, 8
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ja .loop
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REP_RET
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INIT_XMM
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cglobal float_to_fixed24_sse2, 3,3,9, dst, src, len
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movaps m0, [pf_1_24]
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.loop:
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movaps m1, [srcq ]
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movaps m2, [srcq+16 ]
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movaps m3, [srcq+32 ]
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movaps m4, [srcq+48 ]
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%ifdef m8
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movaps m5, [srcq+64 ]
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movaps m6, [srcq+80 ]
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movaps m7, [srcq+96 ]
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movaps m8, [srcq+112]
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%endif
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mulps m1, m0
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mulps m2, m0
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mulps m3, m0
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mulps m4, m0
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%ifdef m8
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mulps m5, m0
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mulps m6, m0
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mulps m7, m0
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mulps m8, m0
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%endif
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cvtps2dq m1, m1
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cvtps2dq m2, m2
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cvtps2dq m3, m3
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cvtps2dq m4, m4
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%ifdef m8
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cvtps2dq m5, m5
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cvtps2dq m6, m6
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cvtps2dq m7, m7
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cvtps2dq m8, m8
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%endif
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movdqa [dstq ], m1
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movdqa [dstq+16 ], m2
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movdqa [dstq+32 ], m3
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movdqa [dstq+48 ], m4
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%ifdef m8
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movdqa [dstq+64 ], m5
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movdqa [dstq+80 ], m6
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movdqa [dstq+96 ], m7
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movdqa [dstq+112], m8
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add srcq, 128
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add dstq, 128
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sub lenq, 32
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%else
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add srcq, 64
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add dstq, 64
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sub lenq, 16
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%endif
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ja .loop
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REP_RET
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