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Add some more hints to the bare-metal RTC exercise (#581)

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* Add some more hints to the bare-metal RTC exercise

I and several others had some difficulties with this part of the problem, especially with regards to knowing where the RTC was wired up and how to fully enable the GIC / interrupts, so add this information to the exercise.

* Remove extra semicolon.

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Co-authored-by: Andrew Walbran <qwandor@google.com>
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Eric Ye 2023-04-25 01:46:37 -07:00 committed by GitHub
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src/exercises/bare-metal/rtc.md
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@ -8,7 +8,10 @@ should write a driver for it.
2. Use the match register and raw interrupt status to busy-wait until a given time, e.g. 3 seconds
in the future. (Call [`core::hint::spin_loop`][3] inside the loop.)
3. _Extension if you have time:_ Enable and handle the interrupt generated by the RTC match. You can
use the driver provided in the `arm-gic` crate to configure the Arm Generic Interrupt Controller.
use the driver provided in the [`arm-gic`][4] crate to configure the Arm Generic Interrupt Controller.
- Use the RTC interrupt, which is wired to the GIC as `IntId::spi(2)`.
- Once the interrupt is enabled, you can put the core to sleep via `arm_gic::wfi()`, which will cause the core to sleep until it receives an interrupt.
Download the [exercise template](../../comprehensive-rust-exercises.zip) and look in the `rtc`
directory for the following files.
@ -124,3 +127,4 @@ Run the code in QEMU with `make qemu`.
[1]: https://developer.arm.com/documentation/ddi0224/c
[2]: https://crates.io/crates/chrono
[3]: https://doc.rust-lang.org/core/hint/fn.spin_loop.html
[4]: https://docs.rs/crate/arm-gic/0.1.0