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mirror of https://github.com/google/comprehensive-rust.git synced 2025-03-25 15:38:01 +02:00

Make base address constants a pointer rather than a usize.

This commit is contained in:
Andrew Walbran 2023-03-22 16:24:24 +00:00
parent 782313e16e
commit fc36e40eef
5 changed files with 11 additions and 13 deletions
src
bare-metal/aps/examples/src
exercises/bare-metal/rtc/src

@ -25,13 +25,13 @@ use log::error;
use psci::system_off;
/// Base address of the primary PL011 UART.
pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
#[no_mangle]
extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
// and nothing else accesses that address range.
let mut uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
let mut uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
writeln!(uart, "main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3).unwrap();

@ -26,13 +26,13 @@ use log::{error, info, LevelFilter};
use psci::system_off;
/// Base address of the primary PL011 UART.
pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
#[no_mangle]
extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
// and nothing else accesses that address range.
let uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
let uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
logger::init(uart, LevelFilter::Trace).unwrap();
info!("main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3);

@ -25,7 +25,7 @@ use log::error;
use psci::system_off;
/// Base address of the primary PL011 UART.
pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
pub const PL011_BASE_ADDRESS: *mut u8 = 0x900_0000 as _;
#[no_mangle]
extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {

@ -32,10 +32,8 @@ impl Uart {
/// The given base address must point to the 8 MMIO control registers of a
/// PL011 device, which must be mapped into the address space of the process
/// as device memory and not have any other aliases.
pub unsafe fn new(base_address: usize) -> Self {
Self {
base_address: base_address as *mut u8,
}
pub unsafe fn new(base_address: *mut u8) -> Self {
Self { base_address }
}
/// Writes a single byte to the UART.

@ -31,18 +31,18 @@ use log::{error, info, LevelFilter};
use psci::system_off;
/// Base address of the primary PL011 UART.
pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
// ANCHOR_END: imports
/// Base address of the PL031 RTC.
pub const PL031_BASE_ADDRESS: usize = 0x901_0000;
pub const PL031_BASE_ADDRESS: *mut u32 = 0x901_0000 as _;
// ANCHOR: main
#[no_mangle]
extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
// and nothing else accesses that address range.
let uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
let uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
logger::init(uart, LevelFilter::Trace).unwrap();
info!("main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3);
@ -50,7 +50,7 @@ extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
// Safe because `PL031_BASE_ADDRESS` is the base address of a PL031 device,
// and nothing else accesses that address range.
let rtc = unsafe { Rtc::new(PL031_BASE_ADDRESS as *mut u32) };
let rtc = unsafe { Rtc::new(PL031_BASE_ADDRESS) };
let time = Utc.timestamp_opt(rtc.read().into(), 0).unwrap();
info!("RTC: {}", time);