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https://github.com/google/comprehensive-rust.git
synced 2025-03-25 15:38:01 +02:00
Make base address constants a pointer rather than a usize.
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parent
782313e16e
commit
fc36e40eef
src
bare-metal/aps/examples/src
exercises/bare-metal/rtc/src
@ -25,13 +25,13 @@ use log::error;
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use psci::system_off;
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/// Base address of the primary PL011 UART.
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pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
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pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
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#[no_mangle]
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extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
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// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
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// and nothing else accesses that address range.
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let mut uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
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let mut uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
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writeln!(uart, "main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3).unwrap();
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@ -26,13 +26,13 @@ use log::{error, info, LevelFilter};
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use psci::system_off;
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/// Base address of the primary PL011 UART.
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pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
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pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
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#[no_mangle]
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extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
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// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
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// and nothing else accesses that address range.
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let uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
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let uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
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logger::init(uart, LevelFilter::Trace).unwrap();
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info!("main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3);
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@ -25,7 +25,7 @@ use log::error;
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use psci::system_off;
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/// Base address of the primary PL011 UART.
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pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
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pub const PL011_BASE_ADDRESS: *mut u8 = 0x900_0000 as _;
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#[no_mangle]
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extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
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@ -32,10 +32,8 @@ impl Uart {
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/// The given base address must point to the 8 MMIO control registers of a
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/// PL011 device, which must be mapped into the address space of the process
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/// as device memory and not have any other aliases.
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pub unsafe fn new(base_address: usize) -> Self {
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Self {
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base_address: base_address as *mut u8,
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}
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pub unsafe fn new(base_address: *mut u8) -> Self {
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Self { base_address }
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}
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/// Writes a single byte to the UART.
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@ -31,18 +31,18 @@ use log::{error, info, LevelFilter};
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use psci::system_off;
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/// Base address of the primary PL011 UART.
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pub const PL011_BASE_ADDRESS: usize = 0x900_0000;
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pub const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;
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// ANCHOR_END: imports
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/// Base address of the PL031 RTC.
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pub const PL031_BASE_ADDRESS: usize = 0x901_0000;
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pub const PL031_BASE_ADDRESS: *mut u32 = 0x901_0000 as _;
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// ANCHOR: main
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#[no_mangle]
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extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
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// Safe because `PL011_BASE_ADDRESS` is the base address of a PL011 device,
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// and nothing else accesses that address range.
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let uart = unsafe { Uart::new(PL011_BASE_ADDRESS as *mut u32) };
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let uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
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logger::init(uart, LevelFilter::Trace).unwrap();
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info!("main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3);
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@ -50,7 +50,7 @@ extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
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// Safe because `PL031_BASE_ADDRESS` is the base address of a PL031 device,
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// and nothing else accesses that address range.
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let rtc = unsafe { Rtc::new(PL031_BASE_ADDRESS as *mut u32) };
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let rtc = unsafe { Rtc::new(PL031_BASE_ADDRESS) };
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let time = Utc.timestamp_opt(rtc.read().into(), 0).unwrap();
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info!("RTC: {}", time);
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