2006-07-30 06:45:02 +03:00
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/*
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* VC-1 and WMV3 decoder - DSP functions
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* Copyright (c) 2006 Konstantin Shishkov
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*
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2006-10-07 18:30:46 +03:00
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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2006-07-30 06:45:02 +03:00
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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2006-10-07 18:30:46 +03:00
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* version 2.1 of the License, or (at your option) any later version.
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2006-07-30 06:45:02 +03:00
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*
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2006-10-07 18:30:46 +03:00
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* FFmpeg is distributed in the hope that it will be useful,
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2006-07-30 06:45:02 +03:00
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2006-10-07 18:30:46 +03:00
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* License along with FFmpeg; if not, write to the Free Software
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2006-07-30 06:45:02 +03:00
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/**
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* @file vc1dsp.c
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* VC-1 and WMV3 decoder
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*
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*/
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#include "dsputil.h"
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2006-11-17 08:10:52 +02:00
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/** Apply overlap transform to horizontal edge
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2006-07-30 06:45:02 +03:00
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*/
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2006-11-26 06:57:31 +02:00
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static void vc1_v_overlap_c(uint8_t* src, int stride)
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2006-07-30 06:45:02 +03:00
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{
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int i;
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int a, b, c, d;
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2006-11-17 08:12:33 +02:00
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int d1, d2;
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2006-11-26 06:57:31 +02:00
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int rnd = 1;
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2006-07-30 06:45:02 +03:00
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for(i = 0; i < 8; i++) {
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a = src[-2*stride];
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b = src[-stride];
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c = src[0];
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d = src[stride];
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2006-11-17 08:12:33 +02:00
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d1 = (a - d + 3 + rnd) >> 3;
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d2 = (a - d + b - c + 4 - rnd) >> 3;
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2006-07-30 06:45:02 +03:00
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2006-11-17 08:12:33 +02:00
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src[-2*stride] = a - d1;
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src[-stride] = b - d2;
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src[0] = c + d2;
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src[stride] = d + d1;
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2006-07-30 06:45:02 +03:00
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src++;
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2006-11-26 06:57:31 +02:00
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rnd = !rnd;
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2006-07-30 06:45:02 +03:00
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}
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}
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2006-11-17 08:10:52 +02:00
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/** Apply overlap transform to vertical edge
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2006-07-30 06:45:02 +03:00
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*/
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2006-11-26 06:57:31 +02:00
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static void vc1_h_overlap_c(uint8_t* src, int stride)
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2006-07-30 06:45:02 +03:00
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{
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int i;
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int a, b, c, d;
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2006-11-17 08:12:33 +02:00
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int d1, d2;
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2006-11-26 06:57:31 +02:00
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int rnd = 1;
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2006-07-30 06:45:02 +03:00
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for(i = 0; i < 8; i++) {
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a = src[-2];
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b = src[-1];
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c = src[0];
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d = src[1];
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2006-11-17 08:12:33 +02:00
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d1 = (a - d + 3 + rnd) >> 3;
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d2 = (a - d + b - c + 4 - rnd) >> 3;
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2006-07-30 06:45:02 +03:00
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2006-11-17 08:12:33 +02:00
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src[-2] = a - d1;
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src[-1] = b - d2;
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src[0] = c + d2;
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src[1] = d + d1;
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2006-07-30 06:45:02 +03:00
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src += stride;
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2006-11-26 06:57:31 +02:00
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rnd = !rnd;
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2006-07-30 06:45:02 +03:00
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}
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}
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/** Do inverse transform on 8x8 block
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*/
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static void vc1_inv_trans_8x8_c(DCTELEM block[64])
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{
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int i;
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register int t1,t2,t3,t4,t5,t6,t7,t8;
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DCTELEM *src, *dst;
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src = block;
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dst = block;
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for(i = 0; i < 8; i++){
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t1 = 12 * (src[0] + src[4]);
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t2 = 12 * (src[0] - src[4]);
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t3 = 16 * src[2] + 6 * src[6];
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t4 = 6 * src[2] - 16 * src[6];
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t5 = t1 + t3;
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t6 = t2 + t4;
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t7 = t2 - t4;
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t8 = t1 - t3;
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t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7];
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t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7];
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t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7];
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t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7];
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dst[0] = (t5 + t1 + 4) >> 3;
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dst[1] = (t6 + t2 + 4) >> 3;
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dst[2] = (t7 + t3 + 4) >> 3;
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dst[3] = (t8 + t4 + 4) >> 3;
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dst[4] = (t8 - t4 + 4) >> 3;
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dst[5] = (t7 - t3 + 4) >> 3;
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dst[6] = (t6 - t2 + 4) >> 3;
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dst[7] = (t5 - t1 + 4) >> 3;
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src += 8;
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dst += 8;
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}
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src = block;
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dst = block;
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for(i = 0; i < 8; i++){
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t1 = 12 * (src[ 0] + src[32]);
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t2 = 12 * (src[ 0] - src[32]);
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t3 = 16 * src[16] + 6 * src[48];
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t4 = 6 * src[16] - 16 * src[48];
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t5 = t1 + t3;
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t6 = t2 + t4;
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t7 = t2 - t4;
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t8 = t1 - t3;
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t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56];
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t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56];
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t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56];
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t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56];
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dst[ 0] = (t5 + t1 + 64) >> 7;
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dst[ 8] = (t6 + t2 + 64) >> 7;
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dst[16] = (t7 + t3 + 64) >> 7;
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dst[24] = (t8 + t4 + 64) >> 7;
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dst[32] = (t8 - t4 + 64 + 1) >> 7;
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dst[40] = (t7 - t3 + 64 + 1) >> 7;
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dst[48] = (t6 - t2 + 64 + 1) >> 7;
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dst[56] = (t5 - t1 + 64 + 1) >> 7;
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src++;
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dst++;
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}
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}
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/** Do inverse transform on 8x4 part of block
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*/
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static void vc1_inv_trans_8x4_c(DCTELEM block[64], int n)
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{
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int i;
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register int t1,t2,t3,t4,t5,t6,t7,t8;
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DCTELEM *src, *dst;
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int off;
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off = n * 32;
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src = block + off;
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dst = block + off;
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for(i = 0; i < 4; i++){
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t1 = 12 * (src[0] + src[4]);
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t2 = 12 * (src[0] - src[4]);
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t3 = 16 * src[2] + 6 * src[6];
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t4 = 6 * src[2] - 16 * src[6];
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t5 = t1 + t3;
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t6 = t2 + t4;
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t7 = t2 - t4;
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t8 = t1 - t3;
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t1 = 16 * src[1] + 15 * src[3] + 9 * src[5] + 4 * src[7];
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t2 = 15 * src[1] - 4 * src[3] - 16 * src[5] - 9 * src[7];
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t3 = 9 * src[1] - 16 * src[3] + 4 * src[5] + 15 * src[7];
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t4 = 4 * src[1] - 9 * src[3] + 15 * src[5] - 16 * src[7];
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dst[0] = (t5 + t1 + 4) >> 3;
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dst[1] = (t6 + t2 + 4) >> 3;
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dst[2] = (t7 + t3 + 4) >> 3;
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dst[3] = (t8 + t4 + 4) >> 3;
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dst[4] = (t8 - t4 + 4) >> 3;
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dst[5] = (t7 - t3 + 4) >> 3;
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dst[6] = (t6 - t2 + 4) >> 3;
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dst[7] = (t5 - t1 + 4) >> 3;
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src += 8;
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dst += 8;
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}
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src = block + off;
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dst = block + off;
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for(i = 0; i < 8; i++){
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t1 = 17 * (src[ 0] + src[16]);
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t2 = 17 * (src[ 0] - src[16]);
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t3 = 22 * src[ 8];
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t4 = 22 * src[24];
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t5 = 10 * src[ 8];
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t6 = 10 * src[24];
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dst[ 0] = (t1 + t3 + t6 + 64) >> 7;
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dst[ 8] = (t2 - t4 + t5 + 64) >> 7;
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dst[16] = (t2 + t4 - t5 + 64) >> 7;
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dst[24] = (t1 - t3 - t6 + 64) >> 7;
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src ++;
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dst ++;
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}
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}
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/** Do inverse transform on 4x8 parts of block
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*/
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static void vc1_inv_trans_4x8_c(DCTELEM block[64], int n)
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{
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int i;
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register int t1,t2,t3,t4,t5,t6,t7,t8;
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DCTELEM *src, *dst;
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int off;
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off = n * 4;
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src = block + off;
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dst = block + off;
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for(i = 0; i < 8; i++){
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t1 = 17 * (src[0] + src[2]);
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t2 = 17 * (src[0] - src[2]);
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t3 = 22 * src[1];
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t4 = 22 * src[3];
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t5 = 10 * src[1];
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t6 = 10 * src[3];
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dst[0] = (t1 + t3 + t6 + 4) >> 3;
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dst[1] = (t2 - t4 + t5 + 4) >> 3;
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dst[2] = (t2 + t4 - t5 + 4) >> 3;
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dst[3] = (t1 - t3 - t6 + 4) >> 3;
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src += 8;
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dst += 8;
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}
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src = block + off;
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dst = block + off;
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for(i = 0; i < 4; i++){
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t1 = 12 * (src[ 0] + src[32]);
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t2 = 12 * (src[ 0] - src[32]);
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t3 = 16 * src[16] + 6 * src[48];
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t4 = 6 * src[16] - 16 * src[48];
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t5 = t1 + t3;
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t6 = t2 + t4;
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t7 = t2 - t4;
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t8 = t1 - t3;
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t1 = 16 * src[ 8] + 15 * src[24] + 9 * src[40] + 4 * src[56];
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t2 = 15 * src[ 8] - 4 * src[24] - 16 * src[40] - 9 * src[56];
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t3 = 9 * src[ 8] - 16 * src[24] + 4 * src[40] + 15 * src[56];
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t4 = 4 * src[ 8] - 9 * src[24] + 15 * src[40] - 16 * src[56];
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dst[ 0] = (t5 + t1 + 64) >> 7;
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dst[ 8] = (t6 + t2 + 64) >> 7;
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dst[16] = (t7 + t3 + 64) >> 7;
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dst[24] = (t8 + t4 + 64) >> 7;
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dst[32] = (t8 - t4 + 64 + 1) >> 7;
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dst[40] = (t7 - t3 + 64 + 1) >> 7;
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dst[48] = (t6 - t2 + 64 + 1) >> 7;
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dst[56] = (t5 - t1 + 64 + 1) >> 7;
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src++;
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dst++;
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}
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}
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/** Do inverse transform on 4x4 part of block
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*/
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static void vc1_inv_trans_4x4_c(DCTELEM block[64], int n)
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{
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int i;
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register int t1,t2,t3,t4,t5,t6;
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DCTELEM *src, *dst;
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int off;
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off = (n&1) * 4 + (n&2) * 16;
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src = block + off;
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dst = block + off;
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for(i = 0; i < 4; i++){
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t1 = 17 * (src[0] + src[2]);
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t2 = 17 * (src[0] - src[2]);
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t3 = 22 * src[1];
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t4 = 22 * src[3];
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t5 = 10 * src[1];
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t6 = 10 * src[3];
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dst[0] = (t1 + t3 + t6 + 4) >> 3;
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dst[1] = (t2 - t4 + t5 + 4) >> 3;
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dst[2] = (t2 + t4 - t5 + 4) >> 3;
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dst[3] = (t1 - t3 - t6 + 4) >> 3;
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src += 8;
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dst += 8;
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}
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src = block + off;
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dst = block + off;
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for(i = 0; i < 4; i++){
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t1 = 17 * (src[ 0] + src[16]);
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t2 = 17 * (src[ 0] - src[16]);
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t3 = 22 * src[ 8];
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t4 = 22 * src[24];
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t5 = 10 * src[ 8];
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t6 = 10 * src[24];
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dst[ 0] = (t1 + t3 + t6 + 64) >> 7;
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dst[ 8] = (t2 - t4 + t5 + 64) >> 7;
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dst[16] = (t2 + t4 - t5 + 64) >> 7;
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dst[24] = (t1 - t3 - t6 + 64) >> 7;
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src ++;
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dst ++;
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}
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}
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/* motion compensation functions */
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2007-07-29 07:04:21 +03:00
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/** Filter in case of 2 filters */
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#define VC1_MSPEL_FILTER_16B(DIR, TYPE) \
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static av_always_inline int vc1_mspel_ ## DIR ## _filter_16bits(const TYPE *src, int stride, int mode) \
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{ \
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switch(mode){ \
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case 0: /* no shift - should not occur */ \
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return 0; \
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case 1: /* 1/4 shift */ \
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return -4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2]; \
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case 2: /* 1/2 shift */ \
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return -src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2]; \
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case 3: /* 3/4 shift */ \
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return -3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2]; \
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} \
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return 0; /* should not occur */ \
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}
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VC1_MSPEL_FILTER_16B(ver, uint8_t);
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VC1_MSPEL_FILTER_16B(hor, int16_t);
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2006-07-30 06:45:02 +03:00
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/** Filter used to interpolate fractional pel values
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*/
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2006-12-08 02:35:08 +02:00
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static av_always_inline int vc1_mspel_filter(const uint8_t *src, int stride, int mode, int r)
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2006-07-30 06:45:02 +03:00
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{
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switch(mode){
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case 0: //no shift
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return src[0];
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case 1: // 1/4 shift
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return (-4*src[-stride] + 53*src[0] + 18*src[stride] - 3*src[stride*2] + 32 - r) >> 6;
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case 2: // 1/2 shift
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return (-src[-stride] + 9*src[0] + 9*src[stride] - src[stride*2] + 8 - r) >> 4;
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case 3: // 3/4 shift
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return (-3*src[-stride] + 18*src[0] + 53*src[stride] - 4*src[stride*2] + 32 - r) >> 6;
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}
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return 0; //should not occur
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}
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/** Function used to do motion compensation with bicubic interpolation
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*/
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2007-07-08 16:34:02 +03:00
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static void vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride, int hmode, int vmode, int rnd)
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2006-07-30 06:45:02 +03:00
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{
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2007-07-29 07:04:21 +03:00
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int i, j;
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if (vmode) { /* Horizontal filter to apply */
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int r;
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if (hmode) { /* Vertical filter to apply, output to tmp */
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static const int shift_value[] = { 0, 5, 1, 5 };
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int shift = (shift_value[hmode]+shift_value[vmode])>>1;
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int16_t tmp[11*8], *tptr = tmp;
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r = (1<<(shift-1)) + rnd-1;
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src -= 1;
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for(j = 0; j < 8; j++) {
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for(i = 0; i < 11; i++)
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tptr[i] = (vc1_mspel_ver_filter_16bits(src + i, stride, vmode)+r)>>shift;
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src += stride;
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tptr += 11;
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}
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r = 64-rnd;
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tptr = tmp+1;
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for(j = 0; j < 8; j++) {
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for(i = 0; i < 8; i++)
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dst[i] = av_clip_uint8((vc1_mspel_hor_filter_16bits(tptr + i, 1, hmode)+r)>>7);
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dst += stride;
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tptr += 11;
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}
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return;
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}
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else { /* No horizontal filter, output 8 lines to dst */
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r = 1-rnd;
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for(j = 0; j < 8; j++) {
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for(i = 0; i < 8; i++)
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dst[i] = av_clip_uint8(vc1_mspel_filter(src + i, stride, vmode, r));
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src += stride;
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dst += stride;
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}
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return;
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}
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2006-07-30 06:45:02 +03:00
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}
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2007-07-29 07:04:21 +03:00
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/* Horizontal mode with no vertical mode */
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2006-07-30 06:45:02 +03:00
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for(j = 0; j < 8; j++) {
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for(i = 0; i < 8; i++)
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2007-07-29 07:04:21 +03:00
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dst[i] = av_clip_uint8(vc1_mspel_filter(src + i, 1, hmode, rnd));
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2006-07-30 06:45:02 +03:00
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dst += stride;
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2007-07-29 07:04:21 +03:00
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src += stride;
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2006-07-30 06:45:02 +03:00
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}
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}
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/* pixel functions - really are entry points to vc1_mspel_mc */
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/* this one is defined in dsputil.c */
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void ff_put_vc1_mspel_mc00_c(uint8_t *dst, const uint8_t *src, int stride, int rnd);
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2007-07-08 16:26:13 +03:00
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#define PUT_VC1_MSPEL(a, b)\
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static void put_vc1_mspel_mc ## a ## b ##_c(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
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2007-07-08 16:34:02 +03:00
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vc1_mspel_mc(dst, src, stride, a, b, rnd); \
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2006-07-30 06:45:02 +03:00
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}
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2007-07-08 16:26:13 +03:00
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PUT_VC1_MSPEL(1, 0)
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PUT_VC1_MSPEL(2, 0)
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PUT_VC1_MSPEL(3, 0)
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2006-07-30 06:45:02 +03:00
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2007-07-08 16:26:13 +03:00
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PUT_VC1_MSPEL(0, 1)
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PUT_VC1_MSPEL(1, 1)
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PUT_VC1_MSPEL(2, 1)
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PUT_VC1_MSPEL(3, 1)
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2006-07-30 06:45:02 +03:00
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2007-07-08 16:26:13 +03:00
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PUT_VC1_MSPEL(0, 2)
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PUT_VC1_MSPEL(1, 2)
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PUT_VC1_MSPEL(2, 2)
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PUT_VC1_MSPEL(3, 2)
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2006-07-30 06:45:02 +03:00
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2007-07-08 16:26:13 +03:00
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PUT_VC1_MSPEL(0, 3)
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PUT_VC1_MSPEL(1, 3)
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PUT_VC1_MSPEL(2, 3)
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PUT_VC1_MSPEL(3, 3)
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2006-07-30 06:45:02 +03:00
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void ff_vc1dsp_init(DSPContext* dsp, AVCodecContext *avctx) {
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dsp->vc1_inv_trans_8x8 = vc1_inv_trans_8x8_c;
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dsp->vc1_inv_trans_4x8 = vc1_inv_trans_4x8_c;
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dsp->vc1_inv_trans_8x4 = vc1_inv_trans_8x4_c;
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dsp->vc1_inv_trans_4x4 = vc1_inv_trans_4x4_c;
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dsp->vc1_h_overlap = vc1_h_overlap_c;
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dsp->vc1_v_overlap = vc1_v_overlap_c;
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dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_c;
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2007-07-08 16:23:44 +03:00
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dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_c;
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dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_c;
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dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_c;
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dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_c;
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dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_c;
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dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_c;
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dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_c;
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dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_c;
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dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_c;
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dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_c;
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dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_c;
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dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_c;
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dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_c;
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dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_c;
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dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_c;
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2006-07-30 06:45:02 +03:00
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}
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