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lavc/aarch64: Provide neon implementation of nsse16
Add vectorized implementation of nsse16 function. Performance comparison tests are shown below. - nsse_0_c: 682.2 - nsse_0_neon: 116.5 Benchmarks and tests run with checkasm tool on AWS Graviton 3. Co-authored-by: Martin Storsjö <martin@martin.st> Signed-off-by: Hubert Mazur <hum@semihalf.com> Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Hubert Mazur
Martin Storsjö
parent
908abe8032
commit
06b98e396a
@ -49,6 +49,10 @@ int vsse16_neon(MpegEncContext *c, const uint8_t *s1, const uint8_t *s2,
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ptrdiff_t stride, int h);
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int vsse_intra16_neon(MpegEncContext *c, const uint8_t *s, const uint8_t *dummy,
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ptrdiff_t stride, int h);
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int nsse16_neon(int multiplier, const uint8_t *s, const uint8_t *s2,
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ptrdiff_t stride, int h);
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int nsse16_neon_wrapper(MpegEncContext *c, const uint8_t *s1, const uint8_t *s2,
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ptrdiff_t stride, int h);
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av_cold void ff_me_cmp_init_aarch64(MECmpContext *c, AVCodecContext *avctx)
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{
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@ -72,5 +76,16 @@ av_cold void ff_me_cmp_init_aarch64(MECmpContext *c, AVCodecContext *avctx)
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c->vsse[0] = vsse16_neon;
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c->vsse[4] = vsse_intra16_neon;
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c->nsse[0] = nsse16_neon_wrapper;
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}
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}
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int nsse16_neon_wrapper(MpegEncContext *c, const uint8_t *s1, const uint8_t *s2,
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ptrdiff_t stride, int h)
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{
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if (c)
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return nsse16_neon(c->avctx->nsse_weight, s1, s2, stride, h);
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else
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return nsse16_neon(8, s1, s2, stride, h);
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}
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@ -847,3 +847,125 @@ function vsse_intra16_neon, export=1
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ret
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endfunc
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function nsse16_neon, export=1
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// x0 multiplier
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// x1 uint8_t *pix1
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// x2 uint8_t *pix2
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// x3 ptrdiff_t stride
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// w4 int h
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str x0, [sp, #-0x40]!
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stp x1, x2, [sp, #0x10]
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stp x3, x4, [sp, #0x20]
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str x30, [sp, #0x30]
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bl X(sse16_neon)
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ldr x30, [sp, #0x30]
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mov w9, w0 // here we store score1
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ldr x5, [sp]
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ldp x1, x2, [sp, #0x10]
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ldp x3, x4, [sp, #0x20]
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add sp, sp, #0x40
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movi v16.8h, #0
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movi v17.8h, #0
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movi v18.8h, #0
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movi v19.8h, #0
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ld1 {v0.16b}, [x1], x3
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subs w4, w4, #1 // we need to make h-1 iterations
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ld1 {v2.16b}, [x2], x3
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ext v1.16b, v0.16b, v0.16b, #1 // x1 + 1
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cmp w4, #2
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ext v3.16b, v2.16b, v2.16b, #1 // x2 + 1
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b.lt 2f
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// make 2 iterations at once
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1:
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ld1 {v4.16b}, [x1], x3
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ld1 {v6.16b}, [x2], x3
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ld1 {v20.16b}, [x1], x3
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ext v5.16b, v4.16b, v4.16b, #1 // x1 + stride + 1
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usubl v31.8h, v0.8b, v4.8b
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usubl2 v30.8h, v0.16b, v4.16b
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ld1 {v22.16b}, [x2], x3
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usubl v29.8h, v1.8b, v5.8b
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usubl2 v28.8h, v1.16b, v5.16b
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ext v7.16b, v6.16b, v6.16b, #1 // x2 + stride + 1
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saba v16.8h, v31.8h, v29.8h
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ext v21.16b, v20.16b, v20.16b, #1
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saba v17.8h, v30.8h, v28.8h
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usubl v27.8h, v2.8b, v6.8b
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usubl2 v26.8h, v2.16b, v6.16b
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ext v23.16b, v22.16b, v22.16b, #1
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usubl v25.8h, v3.8b, v7.8b
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usubl2 v24.8h, v3.16b, v7.16b
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saba v18.8h, v27.8h, v25.8h
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saba v19.8h, v26.8h, v24.8h
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usubl v31.8h, v4.8b, v20.8b
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usubl2 v30.8h, v4.16b, v20.16b
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usubl v29.8h, v5.8b, v21.8b
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usubl2 v28.8h, v5.16b, v21.16b
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saba v16.8h, v31.8h, v29.8h
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saba v17.8h, v30.8h, v28.8h
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usubl v27.8h, v6.8b, v22.8b
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usubl2 v26.8h, v6.16b, v22.16b
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usubl v25.8h, v7.8b, v23.8b
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usubl2 v24.8h, v7.16b, v23.16b
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saba v18.8h, v27.8h, v25.8h
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saba v19.8h, v26.8h, v24.8h
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sub w4, w4, #2
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mov v0.16b, v20.16b
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mov v1.16b, v21.16b
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cmp w4, #2
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mov v2.16b, v22.16b
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mov v3.16b, v23.16b
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b.ge 1b
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cbz w4, 3f
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// iterate by one
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2:
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ld1 {v4.16b}, [x1], x3
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subs w4, w4, #1
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ld1 {v6.16b}, [x2], x3
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ext v5.16b, v4.16b, v4.16b, #1 // x1 + stride + 1
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usubl v31.8h, v0.8b, v4.8b
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ext v7.16b, v6.16b, v6.16b, #1 // x2 + stride + 1
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usubl2 v30.8h, v0.16b, v4.16b
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usubl v29.8h, v1.8b, v5.8b
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usubl2 v28.8h, v1.16b, v5.16b
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saba v16.8h, v31.8h, v29.8h
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saba v17.8h, v30.8h, v28.8h
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usubl v27.8h, v2.8b, v6.8b
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usubl2 v26.8h, v2.16b, v6.16b
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usubl v25.8h, v3.8b, v7.8b
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usubl2 v24.8h, v3.16b, v7.16b
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saba v18.8h, v27.8h, v25.8h
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saba v19.8h, v26.8h, v24.8h
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mov v0.16b, v4.16b
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mov v1.16b, v5.16b
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mov v2.16b, v6.16b
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mov v3.16b, v7.16b
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cbnz w4, 2b
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3:
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sqsub v17.8h, v17.8h, v19.8h
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sqsub v16.8h, v16.8h, v18.8h
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ins v17.h[7], wzr
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sqadd v16.8h, v16.8h, v17.8h
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saddlv s16, v16.8h
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sqabs s16, s16
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fmov w0, s16
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mul w0, w0, w5
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add w0, w0, w9
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ret
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endfunc
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