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doc: reference the RISC-V specification
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@ -267,6 +267,11 @@ CELL/SPU:
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http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/30B3520C93F437AB87257060006FFE5E/$file/Language_Extensions_for_CBEA_2.4.pdf
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http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/9F820A5FFA3ECE8C8725716A0062585F/$file/CBE_Handbook_v1.1_24APR2007_pub.pdf
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RISC-V-specific:
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----------------
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The RISC-V Instruction Set Manual, Volume 1, Unprivileged ISA:
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https://riscv.org/technical/specifications/
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GCC asm links:
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--------------
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official doc but quite ugly
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