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avutil/mips: Avoid instruction exception caused by gssqc1/gslqc1.

Ensure the address accesed by gssqc1/gslqc1 are 16-byte aligned.
This commit is contained in:
Shiyou Yin 2019-07-31 09:30:01 +08:00 committed by Reimar Döffinger
parent 9a2dbfde2e
commit 11f99a9a45
2 changed files with 2 additions and 2 deletions

View File

@ -39,7 +39,7 @@
#define COL_SHIFT 20
#define DC_SHIFT 3
DECLARE_ALIGNED(8, const int16_t, W_arr)[46] = {
DECLARE_ALIGNED(16, const int16_t, W_arr)[46] = {
W4, W2, W4, W6,
W1, W3, W5, W7,
W4, W6, -W4, -W2,

View File

@ -205,7 +205,7 @@
* backup register
*/
#define BACKUP_REG \
double temp_backup_reg[8]; \
LOCAL_ALIGNED_16(double, temp_backup_reg, [8]); \
if (_MIPS_SIM == _ABI64) \
__asm__ volatile ( \
"gssqc1 $f25, $f24, 0x00(%[temp]) \n\t" \