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vp8: disable mmx functions with sse/sse2 counterparts on x86-64.
x86-64 is guaranteed to have at least SSE2, therefore the MMX/MMX2 functions will never be used in practice.
This commit is contained in:
Ronald S. Bultje
parent
bd66f073fe
commit
45549339bc
@ -138,6 +138,7 @@ static void ff_put_vp8_ ## FILTERTYPE ## 8_ ## TAPTYPE ## _ ## OPT( \
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dst + 4, dststride, src + 4, srcstride, height, mx, my); \
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}
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#if ARCH_X86_32
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TAP_W8 (mmxext, epel, h4)
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TAP_W8 (mmxext, epel, h6)
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TAP_W16(mmxext, epel, h6)
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@ -148,6 +149,7 @@ TAP_W8 (mmxext, bilinear, h)
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TAP_W16(mmxext, bilinear, h)
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TAP_W8 (mmxext, bilinear, v)
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TAP_W16(mmxext, bilinear, v)
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#endif
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TAP_W16(sse2, epel, h6)
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TAP_W16(sse2, epel, v6)
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@ -173,15 +175,21 @@ static void ff_put_vp8_epel ## SIZE ## _h ## TAPNUMX ## v ## TAPNUMY ## _ ## OPT
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dst, dststride, tmpptr, SIZE, height, mx, my); \
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}
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#if ARCH_X86_32
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#define HVTAPMMX(x, y) \
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HVTAP(mmxext, 8, x, y, 4, 8) \
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HVTAP(mmxext, 8, x, y, 8, 16)
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HVTAP(mmxext, 8, 6, 6, 16, 16)
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#else
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#define HVTAPMMX(x, y) \
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HVTAP(mmxext, 8, x, y, 4, 8)
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#endif
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HVTAPMMX(4, 4)
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HVTAPMMX(4, 6)
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HVTAPMMX(6, 4)
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HVTAPMMX(6, 6)
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HVTAP(mmxext, 8, 6, 6, 16, 16)
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#define HVTAPSSE2(x, y, w) \
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HVTAP(sse2, 16, x, y, w, 16) \
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@ -211,8 +219,10 @@ static void ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT( \
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}
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HVBILIN(mmxext, 8, 4, 8)
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#if ARCH_X86_32
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HVBILIN(mmxext, 8, 8, 16)
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HVBILIN(mmxext, 8, 16, 16)
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#endif
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HVBILIN(sse2, 8, 8, 16)
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HVBILIN(sse2, 8, 16, 16)
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HVBILIN(ssse3, 8, 4, 8)
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@ -311,15 +321,18 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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if (mm_flags & AV_CPU_FLAG_MMX) {
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c->vp8_idct_dc_add = ff_vp8_idct_dc_add_mmx;
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c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_mmx;
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c->vp8_idct_dc_add4uv = ff_vp8_idct_dc_add4uv_mmx;
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#if ARCH_X86_32
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c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_mmx;
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c->vp8_idct_add = ff_vp8_idct_add_mmx;
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c->vp8_luma_dc_wht = ff_vp8_luma_dc_wht_mmx;
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c->put_vp8_epel_pixels_tab[0][0][0] =
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c->put_vp8_bilinear_pixels_tab[0][0][0] = ff_put_vp8_pixels16_mmx;
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#endif
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c->put_vp8_epel_pixels_tab[1][0][0] =
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c->put_vp8_bilinear_pixels_tab[1][0][0] = ff_put_vp8_pixels8_mmx;
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#if ARCH_X86_32
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c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_mmx;
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c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_mmx;
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@ -332,17 +345,19 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_mmx;
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c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_mmx;
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c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_mmx;
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#endif
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}
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/* note that 4-tap width=16 functions are missing because w=16
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* is only used for luma, and luma is always a copy or sixtap. */
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if (mm_flags & AV_CPU_FLAG_MMX2) {
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VP8_MC_FUNC(2, 4, mmxext);
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VP8_BILINEAR_MC_FUNC(2, 4, mmxext);
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#if ARCH_X86_32
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VP8_LUMA_MC_FUNC(0, 16, mmxext);
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VP8_MC_FUNC(1, 8, mmxext);
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VP8_MC_FUNC(2, 4, mmxext);
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VP8_BILINEAR_MC_FUNC(0, 16, mmxext);
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VP8_BILINEAR_MC_FUNC(1, 8, mmxext);
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VP8_BILINEAR_MC_FUNC(2, 4, mmxext);
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c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_mmxext;
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c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_mmxext;
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@ -356,6 +371,7 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_mmxext;
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c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_mmxext;
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c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_mmxext;
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#endif
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}
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if (mm_flags & AV_CPU_FLAG_SSE) {
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@ -865,6 +865,7 @@ cglobal put_vp8_pixels8_mmx, 5,5
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jg .nextrow
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REP_RET
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%if ARCH_X86_32
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cglobal put_vp8_pixels16_mmx, 5,5
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.nextrow:
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movq mm0, [r2+r3*0+0]
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@ -880,6 +881,7 @@ cglobal put_vp8_pixels16_mmx, 5,5
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sub r4d, 2
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jg .nextrow
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REP_RET
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%endif
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cglobal put_vp8_pixels16_sse, 5,5,2
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.nextrow:
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@ -973,6 +975,7 @@ cglobal vp8_idct_dc_add_sse4, 3, 3, 6
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; void vp8_idct_dc_add4y_<opt>(uint8_t *dst, DCTELEM block[4][16], int stride);
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;-----------------------------------------------------------------------------
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%if ARCH_X86_32
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INIT_MMX
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cglobal vp8_idct_dc_add4y_mmx, 3, 3
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; load data
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@ -1007,6 +1010,7 @@ cglobal vp8_idct_dc_add4y_mmx, 3, 3
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ADD_DC m0, m6, 0, mova
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ADD_DC m1, m7, 8, mova
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RET
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%endif
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INIT_XMM
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cglobal vp8_idct_dc_add4y_sse2, 3, 3, 6
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@ -1152,7 +1156,9 @@ cglobal vp8_idct_add_%1, 3, 3
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RET
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%endmacro
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%if ARCH_X86_32
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VP8_IDCT_ADD mmx
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%endif
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VP8_IDCT_ADD sse
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;-----------------------------------------------------------------------------
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@ -1217,7 +1223,9 @@ cglobal vp8_luma_dc_wht_%1, 2,3
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%endmacro
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INIT_MMX
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%if ARCH_X86_32
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VP8_DC_WHT mmx
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%endif
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VP8_DC_WHT sse
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;-----------------------------------------------------------------------------
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@ -1610,6 +1618,7 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3, %4
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%endif
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%endmacro
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%if ARCH_X86_32
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INIT_MMX
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%define SPLATB_REG SPLATB_REG_MMX
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SIMPLE_LOOPFILTER mmx, v, 4, 0
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@ -1617,6 +1626,8 @@ SIMPLE_LOOPFILTER mmx, h, 5, 0
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%define SPLATB_REG SPLATB_REG_MMXEXT
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SIMPLE_LOOPFILTER mmxext, v, 4, 0
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SIMPLE_LOOPFILTER mmxext, h, 5, 0
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%endif
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INIT_XMM
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%define SPLATB_REG SPLATB_REG_SSE2
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%define WRITE_8W WRITE_8W_SSE2
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@ -2118,6 +2129,7 @@ cglobal vp8_%2_loop_filter16y_inner_%1, 5, %3, %5
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RET
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%endmacro
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%if ARCH_X86_32
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INIT_MMX
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%define SPLATB_REG SPLATB_REG_MMX
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INNER_LOOPFILTER mmx, v, 6, 16, 0
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@ -2130,6 +2142,7 @@ INNER_LOOPFILTER mmxext, v, 6, 16, 0
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INNER_LOOPFILTER mmxext, h, 6, 16, 0
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INNER_LOOPFILTER mmxext, v, 6, 8, 0
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INNER_LOOPFILTER mmxext, h, 6, 8, 0
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%endif
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INIT_XMM
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%define SPLATB_REG SPLATB_REG_SSE2
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@ -2814,6 +2827,7 @@ cglobal vp8_%2_loop_filter16y_mbedge_%1, 5, %3, %5
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RET
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%endmacro
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%if ARCH_X86_32
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INIT_MMX
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%define SPLATB_REG SPLATB_REG_MMX
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MBEDGE_LOOPFILTER mmx, v, 6, 16, 0
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@ -2826,6 +2840,7 @@ MBEDGE_LOOPFILTER mmxext, v, 6, 16, 0
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MBEDGE_LOOPFILTER mmxext, h, 6, 16, 0
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MBEDGE_LOOPFILTER mmxext, v, 6, 8, 0
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MBEDGE_LOOPFILTER mmxext, h, 6, 8, 0
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%endif
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INIT_XMM
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%define SPLATB_REG SPLATB_REG_SSE2
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