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lavc/rv40dsp: R-V V chroma_mc
This is similar to h264, but here we use manual_avg instead of vaaddu because rv40's OP differs from h264. If we use vaaddu, rv40 would need to repeatedly switch between vxrm=0 and vxrm=2, and switching vxrm is very slow. C908: avg_chroma_mc4_c: 2330.0 avg_chroma_mc4_rvv_i32: 602.7 avg_chroma_mc8_c: 1211.0 avg_chroma_mc8_rvv_i32: 602.7 put_chroma_mc4_c: 1825.0 put_chroma_mc4_rvv_i32: 414.7 put_chroma_mc8_c: 932.0 put_chroma_mc8_rvv_i32: 414.7 Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
This commit is contained in:
parent
cfa8d2488d
commit
5bc3b7f513
@ -48,6 +48,8 @@ RV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvi.o
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RVV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvv.o
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OBJS-$(CONFIG_RV34DSP) += riscv/rv34dsp_init.o
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RVV-OBJS-$(CONFIG_RV34DSP) += riscv/rv34dsp_rvv.o
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OBJS-$(CONFIG_RV40_DECODER) += riscv/rv40dsp_init.o
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RVV-OBJS-$(CONFIG_RV40_DECODER) += riscv/rv40dsp_rvv.o
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OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_init.o
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RVV-OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_rvv.o
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OBJS-$(CONFIG_TAK_DECODER) += riscv/takdsp_init.o
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51
libavcodec/riscv/rv40dsp_init.c
Normal file
51
libavcodec/riscv/rv40dsp_init.c
Normal file
@ -0,0 +1,51 @@
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/*
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* Copyright (c) 2024 Institue of Software Chinese Academy of Sciences (ISCAS).
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/riscv/cpu.h"
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#include "libavcodec/rv34dsp.h"
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void ff_put_rv40_chroma_mc8_rvv(uint8_t *dst, const uint8_t *src, ptrdiff_t stride,
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int h, int x, int y);
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void ff_put_rv40_chroma_mc4_rvv(uint8_t *dst, const uint8_t *src, ptrdiff_t stride,
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int h, int x, int y);
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void ff_avg_rv40_chroma_mc8_rvv(uint8_t *dst, const uint8_t *src, ptrdiff_t stride,
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int h, int x, int y);
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void ff_avg_rv40_chroma_mc4_rvv(uint8_t *dst, const uint8_t *src, ptrdiff_t stride,
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int h, int x, int y);
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av_cold void ff_rv40dsp_init_riscv(RV34DSPContext *c)
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{
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#if HAVE_RVV
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int flags = av_get_cpu_flags();
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if ((flags & AV_CPU_FLAG_RVV_I32) && ff_get_rv_vlenb() >= 16 &&
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(flags & AV_CPU_FLAG_RVB_ADDR)) {
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c->put_chroma_pixels_tab[0] = ff_put_rv40_chroma_mc8_rvv;
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c->put_chroma_pixels_tab[1] = ff_put_rv40_chroma_mc4_rvv;
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c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_rvv;
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c->avg_chroma_pixels_tab[1] = ff_avg_rv40_chroma_mc4_rvv;
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}
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#endif
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}
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371
libavcodec/riscv/rv40dsp_rvv.S
Normal file
371
libavcodec/riscv/rv40dsp_rvv.S
Normal file
@ -0,0 +1,371 @@
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/*
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* Copyright (c) 2024 Institue of Software Chinese Academy of Sciences (ISCAS).
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/riscv/asm.S"
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.macro manual_avg dst src1 src2
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vadd.vv \dst, \src1, \src2
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vadd.vi \dst, \dst, 1
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vsrl.vi \dst, \dst, 1
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.endm
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.macro do_chroma_mc type unroll
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csrwi vxrm, 2
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slli t2, a5, 3
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mul t1, a5, a4
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sh3add a5, a4, t2
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slli a4, a4, 3
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sub a5, t1, a5
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sub a7, a4, t1
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addi a6, a5, 64
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sub t0, t2, t1
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vsetvli t3, t6, e8, m1, ta, mu
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beqz t1, 2f
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blez a3, 8f
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li t4, 0
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li t2, 0
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li t5, 1
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addi a5, t3, 1
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slli t3, a2, (1 + \unroll)
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1: # if (xy != 0)
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add a4, a1, t4
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vsetvli zero, a5, e8, m1, ta, ma
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.ifc \unroll,1
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addi t2, t2, 4
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.else
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addi t2, t2, 2
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.endif
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vle8.v v10, (a4)
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add a4, a4, a2
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vslide1down.vx v11, v10, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v8, v10, a6
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vwmaccu.vx v8, a7, v11
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vsetvli zero, a5, e8, m1, ta, ma
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vle8.v v12, (a4)
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vsetvli zero, t6, e8, m1, ta, ma
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add a4, a4, a2
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vwmaccu.vx v8, t0, v12
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vsetvli zero, a5, e8, m1, ta, ma
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vslide1down.vx v13, v12, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v10, v12, a6
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vwmaccu.vx v8, t1, v13
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vwmaccu.vx v10, a7, v13
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vsetvli zero, a5, e8, m1, ta, ma
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vle8.v v14, (a4)
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vsetvli zero, t6, e8, m1, ta, ma
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add a4, a4, a2
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vwmaccu.vx v10, t0, v14
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vsetvli zero, a5, e8, m1, ta, ma
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vslide1down.vx v15, v14, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v12, v14, a6
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vwmaccu.vx v10, t1, v15
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vwmaccu.vx v12, a7, v15
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vnclipu.wi v15, v8, 6
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.ifc \type,avg
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vle8.v v9, (a0)
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manual_avg v15, v15, v9
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.endif
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vse8.v v15, (a0)
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add a0, a0, a2
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vnclipu.wi v8, v10, 6
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.ifc \type,avg
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vle8.v v9, (a0)
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manual_avg v8, v8, v9
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.endif
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add t4, t4, t3
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vse8.v v8, (a0)
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add a0, a0, a2
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.ifc \unroll,1
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vsetvli zero, a5, e8, m1, ta, ma
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vle8.v v14, (a4)
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vsetvli zero, t6, e8, m1, ta, ma
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add a4, a4, a2
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vwmaccu.vx v12, t0, v14
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vsetvli zero, a5, e8, m1, ta, ma
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vslide1down.vx v15, v14, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v16, v14, a6
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vwmaccu.vx v12, t1, v15
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vwmaccu.vx v16, a7, v15
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vsetvli zero, a5, e8, m1, ta, ma
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vle8.v v14, (a4)
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vsetvli zero, t6, e8, m1, ta, ma
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vwmaccu.vx v16, t0, v14
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vsetvli zero, a5, e8, m1, ta, ma
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vslide1down.vx v14, v14, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmaccu.vx v16, t1, v14
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vnclipu.wi v8, v12, 6
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.ifc \type,avg
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vle8.v v9, (a0)
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manual_avg v8, v8, v9
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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vnclipu.wi v8, v16, 6
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.ifc \type,avg
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vle8.v v9, (a0)
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manual_avg v8, v8, v9
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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.endif
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blt t2, a3, 1b
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j 8f
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2:
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bnez a4, 4f
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beqz t2, 4f
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blez a3, 8f
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li a4, 0
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li t1, 0
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slli a7, a2, (1 + \unroll)
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3: # if ((x8 - xy) == 0 && (y8 -xy) != 0)
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add a5, a1, a4
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vsetvli zero, zero, e8, m1, ta, ma
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.ifc \unroll,1
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addi t1, t1, 4
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.else
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addi t1, t1, 2
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.endif
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vle8.v v8, (a5)
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add a5, a5, a2
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add t2, a5, a2
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vwmulu.vx v10, v8, a6
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vle8.v v8, (a5)
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vwmulu.vx v12, v8, a6
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vle8.v v9, (t2)
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add t2, t2, a2
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add a5, t2, a2
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vwmaccu.vx v10, t0, v8
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add a4, a4, a7
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vwmaccu.vx v12, t0, v9
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vnclipu.wi v15, v10, 6
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vwmulu.vx v10, v9, a6
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vnclipu.wi v9, v12, 6
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.ifc \type,avg
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vle8.v v16, (a0)
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manual_avg v15, v15, v16
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.endif
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vse8.v v15, (a0)
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add a0, a0, a2
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.ifc \type,avg
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vle8.v v16, (a0)
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manual_avg v9, v9, v16
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.endif
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vse8.v v9, (a0)
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add a0, a0, a2
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.ifc \unroll,1
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vle8.v v8, (t2)
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vle8.v v14, (a5)
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vwmaccu.vx v10, t0, v8
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vwmulu.vx v12, v8, a6
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vnclipu.wi v8, v10, 6
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vwmaccu.vx v12, t0, v14
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.ifc \type,avg
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vle8.v v16, (a0)
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manual_avg v8, v8, v16
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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vnclipu.wi v8, v12, 6
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.ifc \type,avg
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vle8.v v16, (a0)
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manual_avg v8, v8, v16
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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.endif
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blt t1, a3, 3b
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j 8f
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4:
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beqz a4, 6f
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bnez t2, 6f
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blez a3, 8f
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li a4, 0
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li t2, 0
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addi t0, t3, 1
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slli t1, a2, (1 + \unroll)
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5: # if ((x8 - xy) != 0 && (y8 -xy) == 0)
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add a5, a1, a4
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vsetvli zero, t0, e8, m1, ta, ma
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.ifc \unroll,1
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addi t2, t2, 4
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.else
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addi t2, t2, 2
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.endif
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vle8.v v8, (a5)
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add a5, a5, a2
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vslide1down.vx v9, v8, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v10, v8, a6
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vwmaccu.vx v10, a7, v9
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vsetvli zero, t0, e8, m1, ta, ma
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vle8.v v8, (a5)
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add a5, a5, a2
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vslide1down.vx v9, v8, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v12, v8, a6
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vwmaccu.vx v12, a7, v9
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vnclipu.wi v16, v10, 6
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.ifc \type,avg
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vle8.v v18, (a0)
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manual_avg v16, v16, v18
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.endif
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vse8.v v16, (a0)
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add a0, a0, a2
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vnclipu.wi v10, v12, 6
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.ifc \type,avg
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vle8.v v18, (a0)
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manual_avg v10, v10, v18
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.endif
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add a4, a4, t1
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vse8.v v10, (a0)
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add a0, a0, a2
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.ifc \unroll,1
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vsetvli zero, t0, e8, m1, ta, ma
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vle8.v v8, (a5)
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add a5, a5, a2
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vslide1down.vx v9, v8, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v14, v8, a6
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vwmaccu.vx v14, a7, v9
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vsetvli zero, t0, e8, m1, ta, ma
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vle8.v v8, (a5)
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vslide1down.vx v9, v8, t5
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vsetvli zero, t6, e8, m1, ta, ma
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vwmulu.vx v12, v8, a6
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vnclipu.wi v8, v14, 6
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vwmaccu.vx v12, a7, v9
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.ifc \type,avg
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vle8.v v18, (a0)
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manual_avg v8, v8, v18
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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vnclipu.wi v8, v12, 6
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.ifc \type,avg
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vle8.v v18, (a0)
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manual_avg v8, v8, v18
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.endif
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vse8.v v8, (a0)
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add a0, a0, a2
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.endif
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blt t2, a3, 5b
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j 8f
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6:
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blez a3, 8f
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li a4, 0
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li t2, 0
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slli a7, a2, (1 + \unroll)
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7: # the final else, none of the above conditions are met
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add t0, a1, a4
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vsetvli zero, zero, e8, m1, ta, ma
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add a5, a0, a4
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add a4, a4, a7
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.ifc \unroll,1
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addi t2, t2, 4
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.else
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addi t2, t2, 2
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.endif
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vle8.v v8, (t0)
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add t0, t0, a2
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add t1, t0, a2
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vwmulu.vx v10, v8, a6
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vle8.v v8, (t0)
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add t0, t1, a2
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vnclipu.wi v13, v10, 6
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vwmulu.vx v10, v8, a6
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.ifc \type,avg
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vle8.v v18, (a5)
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manual_avg v13, v13, v18
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.endif
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vse8.v v13, (a5)
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add a5, a5, a2
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vnclipu.wi v8, v10, 6
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.ifc \type,avg
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vle8.v v18, (a5)
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manual_avg v8, v8, v18
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.endif
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vse8.v v8, (a5)
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add a5, a5, a2
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.ifc \unroll,1
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vle8.v v9, (t1)
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vle8.v v12, (t0)
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vwmulu.vx v10, v9, a6
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vnclipu.wi v8, v10, 6
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vwmulu.vx v10, v12, a6
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.ifc \type,avg
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vle8.v v18, (a5)
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manual_avg v8, v8, v18
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.endif
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vse8.v v8, (a5)
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add a5, a5, a2
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vnclipu.wi v8, v10, 6
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.ifc \type,avg
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vle8.v v18, (a5)
|
||||
manual_avg v8, v8, v18
|
||||
.endif
|
||||
vse8.v v8, (a5)
|
||||
.endif
|
||||
blt t2, a3, 7b
|
||||
8:
|
||||
ret
|
||||
.endm
|
||||
|
||||
func ff_put_rv40_chroma_mc_rvv, zve32x
|
||||
11:
|
||||
li a7, 3
|
||||
blt a3, a7, 12f
|
||||
do_chroma_mc put 1
|
||||
12:
|
||||
do_chroma_mc put 0
|
||||
endfunc
|
||||
|
||||
func ff_avg_rv40_chroma_mc_rvv, zve32x
|
||||
21:
|
||||
li a7, 3
|
||||
blt a3, a7, 22f
|
||||
do_chroma_mc avg 1
|
||||
22:
|
||||
do_chroma_mc avg 0
|
||||
endfunc
|
||||
|
||||
func ff_put_rv40_chroma_mc8_rvv, zve32x
|
||||
li t6, 8
|
||||
j 11b
|
||||
endfunc
|
||||
|
||||
func ff_put_rv40_chroma_mc4_rvv, zve32x
|
||||
li t6, 4
|
||||
j 11b
|
||||
endfunc
|
||||
|
||||
func ff_avg_rv40_chroma_mc8_rvv, zve32x
|
||||
li t6, 8
|
||||
j 21b
|
||||
endfunc
|
||||
|
||||
func ff_avg_rv40_chroma_mc4_rvv, zve32x
|
||||
li t6, 4
|
||||
j 21b
|
||||
endfunc
|
@ -83,6 +83,7 @@ void ff_rv34dsp_init_riscv(RV34DSPContext *c);
|
||||
void ff_rv34dsp_init_x86(RV34DSPContext *c);
|
||||
|
||||
void ff_rv40dsp_init_aarch64(RV34DSPContext *c);
|
||||
void ff_rv40dsp_init_riscv(RV34DSPContext *c);
|
||||
void ff_rv40dsp_init_x86(RV34DSPContext *c);
|
||||
void ff_rv40dsp_init_arm(RV34DSPContext *c);
|
||||
|
||||
|
@ -709,6 +709,8 @@ av_cold void ff_rv40dsp_init(RV34DSPContext *c)
|
||||
ff_rv40dsp_init_aarch64(c);
|
||||
#elif ARCH_ARM
|
||||
ff_rv40dsp_init_arm(c);
|
||||
#elif ARCH_RISCV
|
||||
ff_rv40dsp_init_riscv(c);
|
||||
#elif ARCH_X86
|
||||
ff_rv40dsp_init_x86(c);
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user