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Use word-writing instead of dword-writing (with two cached but otherwise
unchanged bytes) in the horizontal simple loopfilter. This makes the filter quite a bit faster in itself (~30 cycles less on Core1), probably mostly because we don't need a complex 4x4 transpose, but only a simple byte interleave. Also allows using pextrw on SSE4, which speeds up even more (e.g. 25% faster on Core i7). Originally committed as revision 24638 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Ronald S. Bultje
parent
ace7f813cd
commit
6341838f3c
@ -346,7 +346,6 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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VP8_BILINEAR_MC_FUNC(1, 8, sse2);
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c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_sse2;
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c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_sse2;
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c->vp8_v_loop_filter16y_inner = ff_vp8_v_loop_filter16y_inner_sse2;
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c->vp8_v_loop_filter8uv_inner = ff_vp8_v_loop_filter8uv_inner_sse2;
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@ -358,6 +357,8 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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if (mm_flags & FF_MM_SSE2) {
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c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_sse2;
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c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_sse2;
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c->vp8_h_loop_filter16y_inner = ff_vp8_h_loop_filter16y_inner_sse2;
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c->vp8_h_loop_filter8uv_inner = ff_vp8_h_loop_filter8uv_inner_sse2;
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@ -390,6 +391,7 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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if (mm_flags & FF_MM_SSE4) {
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c->vp8_idct_dc_add = ff_vp8_idct_dc_add_sse4;
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c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_sse4;
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c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_sse4;
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c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_sse4;
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}
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@ -1354,6 +1354,81 @@ cglobal vp8_luma_dc_wht_mmx, 2,3
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movd [%7+%9*2], m%4
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%endmacro
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; write 4 or 8 words in the mmx/xmm registers as 8 lines
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; 1 and 2 are the registers to write, this can be the same (for SSE2)
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; for pre-SSE4:
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; 3 is a general-purpose register that we will clobber
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; for SSE4:
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; 3 is a pointer to the destination's 5th line
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; 4 is a pointer to the destination's 4th line
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; 5/6 is -stride and +stride
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%macro WRITE_2x4W 6
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movd %3, %1
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punpckhdq %1, %1
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mov [%4+%5*4], %3w
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shr %3, 16
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add %4, %6
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mov [%4+%5*4], %3w
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movd %3, %1
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add %4, %5
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mov [%4+%5*2], %3w
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shr %3, 16
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mov [%4+%5 ], %3w
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movd %3, %2
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punpckhdq %2, %2
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mov [%4 ], %3w
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shr %3, 16
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mov [%4+%6 ], %3w
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movd %3, %2
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add %4, %6
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mov [%4+%6 ], %3w
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shr %3, 16
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mov [%4+%6*2], %3w
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add %4, %5
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%endmacro
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%macro WRITE_8W_SSE2 5
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movd %2, %1
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psrldq %1, 4
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mov [%3+%4*4], %2w
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shr %2, 16
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add %3, %5
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mov [%3+%4*4], %2w
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movd %2, %1
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psrldq %1, 4
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add %3, %4
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mov [%3+%4*2], %2w
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shr %2, 16
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mov [%3+%4 ], %2w
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movd %2, %1
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psrldq %1, 4
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mov [%3 ], %2w
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shr %2, 16
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mov [%3+%5 ], %2w
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movd %2, %1
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add %3, %5
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mov [%3+%5 ], %2w
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shr %2, 16
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mov [%3+%5*2], %2w
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%endmacro
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%macro WRITE_8W_SSE4 5
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pextrw [%3+%4*4], %1, 0
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pextrw [%2+%4*4], %1, 1
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pextrw [%3+%4*2], %1, 2
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pextrw [%3+%4 ], %1, 3
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pextrw [%3 ], %1, 4
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pextrw [%2 ], %1, 5
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pextrw [%2+%5 ], %1, 6
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pextrw [%2+%5*2], %1, 7
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%endmacro
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%macro SPLATB_REG_MMX 2-3
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movd %1, %2
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punpcklbw %1, %1
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@ -1381,10 +1456,6 @@ cglobal vp8_luma_dc_wht_mmx, 2,3
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%macro SIMPLE_LOOPFILTER 3
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cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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%ifidn %2, h
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mov r5, rsp ; backup stack pointer
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and rsp, ~(mmsize-1) ; align stack
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%endif
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%if mmsize == 8 ; mmx/mmxext
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mov r3, 2
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%endif
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@ -1400,7 +1471,6 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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neg r1
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%ifidn %2, h
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lea r0, [r0+4*r2-2]
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sub rsp, mmsize*2 ; (aligned) storage space for saving p1/q1
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%endif
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%if mmsize == 8 ; mmx / mmxext
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@ -1421,9 +1491,6 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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READ_16x4_INTERLEAVED 0, 1, 2, 3, 4, 5, 6, r0, r4, r1, r2, r3
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%endif
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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mova [rsp], m0 ; store p1
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mova [rsp+mmsize], m3 ; store q1
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%endif
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; simple_limit
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@ -1494,17 +1561,21 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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mova [r0], m4
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mova [r0+r1], m6
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%else ; h
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mova m0, [rsp] ; p1
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SWAP 2, 4 ; p0
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SWAP 1, 6 ; q0
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mova m3, [rsp+mmsize] ; q1
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inc r0
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SBUTTERFLY bw, 6, 4, 0
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TRANSPOSE4x4B 0, 1, 2, 3, 4
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%if mmsize == 16 ; sse2
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add r3, r1 ; change from r4*8*stride to r0+8*stride
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WRITE_4x4D 0, 1, 2, 3, r0, r4, r3, r1, r2, 16
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%ifidn %1, sse4
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inc r4
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%endif
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WRITE_8W m6, r4, r0, r1, r2
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lea r4, [r3+r1+1]
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%ifidn %1, sse4
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inc r3
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%endif
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WRITE_8W m4, r3, r4, r1, r2
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%else ; mmx/mmxext
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WRITE_4x2D 0, 1, 2, 3, r0, r4, r1, r2
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WRITE_2x4W m6, m4, r4, r0, r1, r2
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%endif
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%endif
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@ -1513,20 +1584,12 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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%ifidn %2, v
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add r0, 8 ; advance 8 cols = pixels
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%else ; h
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lea r0, [r0+r2*8] ; advance 8 rows = lines
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lea r0, [r0+r2*8-1] ; advance 8 rows = lines
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%endif
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dec r3
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jg .next8px
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%ifidn %2, v
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REP_RET
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%else ; h
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mov rsp, r5 ; restore stack pointer
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RET
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%endif
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%else ; sse2
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%ifidn %2, h
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mov rsp, r5 ; restore stack pointer
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%endif
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RET
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%endif
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%endmacro
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@ -1534,17 +1597,20 @@ cglobal vp8_%2_loop_filter_simple_%1, 3, %3
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INIT_MMX
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%define SPLATB_REG SPLATB_REG_MMX
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SIMPLE_LOOPFILTER mmx, v, 4
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SIMPLE_LOOPFILTER mmx, h, 6
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SIMPLE_LOOPFILTER mmx, h, 5
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%define SPLATB_REG SPLATB_REG_MMXEXT
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SIMPLE_LOOPFILTER mmxext, v, 4
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SIMPLE_LOOPFILTER mmxext, h, 6
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SIMPLE_LOOPFILTER mmxext, h, 5
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INIT_XMM
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%define SPLATB_REG SPLATB_REG_SSE2
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%define WRITE_8W WRITE_8W_SSE2
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SIMPLE_LOOPFILTER sse2, v, 3
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SIMPLE_LOOPFILTER sse2, h, 6
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SIMPLE_LOOPFILTER sse2, h, 5
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%define SPLATB_REG SPLATB_REG_SSSE3
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SIMPLE_LOOPFILTER ssse3, v, 3
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SIMPLE_LOOPFILTER ssse3, h, 6
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SIMPLE_LOOPFILTER ssse3, h, 5
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%define WRITE_8W WRITE_8W_SSE4
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SIMPLE_LOOPFILTER sse4, h, 5
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;-----------------------------------------------------------------------------
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; void vp8_h/v_loop_filter<size>_inner_<opt>(uint8_t *dst, [uint8_t *v,] int stride,
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@ -2075,81 +2141,6 @@ INNER_LOOPFILTER ssse3, h, 6, 8, 13
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; int flimE, int flimI, int hev_thr);
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;-----------------------------------------------------------------------------
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; write 4 or 8 words in the mmx/xmm registers as 8 lines
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; 1 and 2 are the registers to write, this can be the same (for SSE2)
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; for pre-SSE4:
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; 3 is a general-purpose register that we will clobber
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; for SSE4:
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; 3 is a pointer to the destination's 5th line
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; 4 is a pointer to the destination's 4th line
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; 5/6 is -stride and +stride
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%macro WRITE_2x4W 6
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movd %3, %1
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punpckhdq %1, %1
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mov [%4+%5*4], %3w
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shr %3, 16
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add %4, %6
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mov [%4+%5*4], %3w
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movd %3, %1
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add %4, %5
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mov [%4+%5*2], %3w
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shr %3, 16
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mov [%4+%5 ], %3w
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movd %3, %2
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punpckhdq %2, %2
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mov [%4 ], %3w
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shr %3, 16
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mov [%4+%6 ], %3w
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movd %3, %2
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add %4, %6
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mov [%4+%6 ], %3w
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shr %3, 16
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mov [%4+%6*2], %3w
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add %4, %5
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%endmacro
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%macro WRITE_8W_SSE2 5
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movd %2, %1
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psrldq %1, 4
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mov [%3+%4*4], %2w
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shr %2, 16
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add %3, %5
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mov [%3+%4*4], %2w
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movd %2, %1
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psrldq %1, 4
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add %3, %4
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mov [%3+%4*2], %2w
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shr %2, 16
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mov [%3+%4 ], %2w
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movd %2, %1
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psrldq %1, 4
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mov [%3 ], %2w
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shr %2, 16
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mov [%3+%5 ], %2w
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movd %2, %1
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add %3, %5
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mov [%3+%5 ], %2w
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shr %2, 16
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mov [%3+%5*2], %2w
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%endmacro
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%macro WRITE_8W_SSE4 5
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pextrw [%3+%4*4], %1, 0
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pextrw [%2+%4*4], %1, 1
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pextrw [%3+%4*2], %1, 2
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pextrw [%3+%4 ], %1, 3
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pextrw [%3 ], %1, 4
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pextrw [%2 ], %1, 5
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pextrw [%2+%5 ], %1, 6
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pextrw [%2+%5*2], %1, 7
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%endmacro
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%macro MBEDGE_LOOPFILTER 5
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%if %4 == 8 ; chroma
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cglobal vp8_%2_loop_filter8uv_mbedge_%1, 6, %3, %5
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