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ARM: simplify inline asm with 64-bit operands
Signed-off-by: Mans Rullgard <mans@mansr.com>
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@ -59,19 +59,16 @@ static inline av_const int MULH(int a, int b)
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static inline av_const int64_t MUL64(int a, int b)
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{
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union { uint64_t x; unsigned hl[2]; } x;
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__asm__ ("smull %0, %1, %2, %3"
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: "=r"(x.hl[0]), "=r"(x.hl[1]) : "r"(a), "r"(b));
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return x.x;
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int64_t x;
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__asm__ ("smull %Q0, %R0, %1, %2" : "=r"(x) : "r"(a), "r"(b));
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return x;
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}
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#define MUL64 MUL64
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static inline av_const int64_t MAC64(int64_t d, int a, int b)
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{
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union { uint64_t x; unsigned hl[2]; } x = { d };
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__asm__ ("smlal %0, %1, %2, %3"
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: "+r"(x.hl[0]), "+r"(x.hl[1]) : "r"(a), "r"(b));
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return x.x;
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__asm__ ("smlal %Q0, %R0, %1, %2" : "+r"(d) : "r"(a), "r"(b));
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return d;
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}
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#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
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#define MLS64(d, a, b) MAC64(d, -(a), b)
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@ -55,22 +55,21 @@ static av_always_inline void AV_WN32(void *p, uint32_t v)
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#define AV_RN64 AV_RN64
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static av_always_inline uint64_t AV_RN64(const void *p)
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{
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union { uint64_t v; uint32_t hl[2]; } v;
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__asm__ ("ldr %0, %2 \n\t"
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"ldr %1, %3 \n\t"
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: "=&r"(v.hl[0]), "=r"(v.hl[1])
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uint64_t v;
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__asm__ ("ldr %Q0, %1 \n\t"
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"ldr %R0, %2 \n\t"
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: "=&r"(v)
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: "m"(*(const uint32_t*)p), "m"(*((const uint32_t*)p+1)));
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return v.v;
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return v;
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}
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#define AV_WN64 AV_WN64
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static av_always_inline void AV_WN64(void *p, uint64_t v)
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{
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union { uint64_t v; uint32_t hl[2]; } vv = { v };
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__asm__ ("str %2, %0 \n\t"
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"str %3, %1 \n\t"
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__asm__ ("str %Q2, %0 \n\t"
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"str %R2, %1 \n\t"
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: "=m"(*(uint32_t*)p), "=m"(*((uint32_t*)p+1))
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: "r"(vv.hl[0]), "r"(vv.hl[1]));
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: "r"(v));
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}
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#endif /* HAVE_INLINE_ASM */
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