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mirror of https://github.com/FFmpeg/FFmpeg.git synced 2024-11-21 10:55:51 +02:00

x86: Add missing colons after assembly labels

This fixes many warnings of the sort
warning: label alone on a line without a colon might be in error
This commit is contained in:
Diego Biurrun 2016-03-17 10:16:13 +01:00
parent 2816f8a8bb
commit 6be7944ee2
8 changed files with 16 additions and 16 deletions

View File

@ -153,7 +153,7 @@ cglobal vector_clipf, 3, 3, 6, dst, src, len, min, max
movsxdifnidn lenq, lend
.loop
.loop:
mova m2, [srcq + 4 * lenq - 4 * mmsize]
mova m3, [srcq + 4 * lenq - 3 * mmsize]
mova m4, [srcq + 4 * lenq - 2 * mmsize]

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@ -238,7 +238,7 @@ cglobal synth_filter_inner, 0, 6 + 4 * ARCH_X86_64, 7 + 6 * ARCH_X86_64, \
%if ARCH_X86_32
mov buf2, synth_buf2mp
%endif
.mainloop
.mainloop:
; m1 = a m2 = b m3 = c m4 = d
SETZERO m3
SETZERO m4

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@ -386,7 +386,7 @@ MC_CACHE MC10
; void ff_h264_qpel_mc02(uint8_t *dst, uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro V_FILT 10
v_filt%9_%10_10
v_filt%9_%10_10:
add r4, r2
.no_addr4:
FILT_V m0, m1, m2, m3, m4, m5, m6, m7

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@ -139,12 +139,12 @@ WEIGHT_FUNC_HALF_MM 8, 8
je .nonnormal
cmp r5d, 128
jne .normal
.nonnormal
.nonnormal:
sar r5d, 1
sar r6d, 1
sar off_regd, 1
sub r4d, 1
.normal
.normal:
%if cpuflag(ssse3)
movd m4, r5d
movd m0, r6d

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@ -184,7 +184,7 @@ cglobal hevc_qpel_ %+ postfix %+ _ %+ %1 %+ _8, 7, 7, 7, dst, dststride, src, sr
sub src_m3, pixstride3
%endif
.loop
.loop:
%assign i 0
%rep nb_blocks
@ -285,7 +285,7 @@ QPEL_8 64, 1
sub srcm3q, sstride3q
%endif
.loop
.loop:
%assign i 0
%rep nb_blocks
@ -444,7 +444,7 @@ cglobal hevc_epel_ %+ postfix %+ _ %+ %1 %+ _8, 7, 7, 6, dst, dststride, src, sr
%endif
sub srcq, pixstride
.loop
.loop:
%assign i 0
%rep nb_blocks
@ -519,7 +519,7 @@ EPEL_8 32, 1
%endif
sub srcq, pixstride
.loop
.loop:
%assign i 0
%rep nb_blocks
@ -651,7 +651,7 @@ cglobal hevc_put_unweighted_pred_ %+ %2 %+ _ %+ %3, 5, 5, 4, dst, dststride, src
%define STORE_HALF movd
%endif
.loop
.loop:
%assign i 0
%rep (%2 + 7) / 8
@ -772,7 +772,7 @@ cglobal hevc_put_weighted_pred_ %+ %2 %+ _ %+ %3, 8, 8, 8, denom, weight0, offse
SPLATD m3
%endif
.loop
.loop:
%assign i 0
%rep (%2 + 3) / 4

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@ -56,7 +56,7 @@ cglobal v210_planar_pack_10, 5, 5, 4+cpuflag(avx2), y, u, v, dst, width
mova m2, [v210_enc_min_10]
mova m3, [v210_enc_max_10]
.loop
.loop:
movu xm0, [yq+2*widthq]
%if cpuflag(avx2)
vinserti128 m0, m0, [yq+2*widthq+12], 1
@ -112,7 +112,7 @@ cglobal v210_planar_pack_8, 5, 5, 7, y, u, v, dst, width
mova m5, [v210_enc_max_8]
pxor m6, m6
.loop
.loop:
movu xm1, [yq+2*widthq]
%if cpuflag(avx2)
vinserti128 m1, m1, [yq+2*widthq+12], 1

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@ -37,7 +37,7 @@ cglobal lowpass_line, 5, 5, 7
pcmpeqb m6, m6
.loop
.loop:
mova m0, [r3+r1]
mova m1, [r3+r1+mmsize]
pavgb m0, [r4+r1]

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@ -28,10 +28,10 @@ cglobal image_copy_plane_uc_from, 6, 7, 4, dst, dst_linesize, src, src_linesize,
add srcq, bwq
neg bwq
.row_start
.row_start:
mov rowposq, bwq
.loop
.loop:
movntdqa m0, [srcq + rowposq + 0 * mmsize]
movntdqa m1, [srcq + rowposq + 1 * mmsize]
movntdqa m2, [srcq + rowposq + 2 * mmsize]