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Merge commit 'fca3c3b61952aacc45e9ca54d86a762946c21942'
* commit 'fca3c3b61952aacc45e9ca54d86a762946c21942': hevc: Add AVX2 DC IDCT Mostly noop as we already have that code. In the ASM, code is merged with the exception of SECTION which is kept uppercase for consistency with the rest of the codebase. Still in the ASM, the prototype comment is fixed to honor the '_' added from the original commit. idct_dc_proto() is dropped as it's not used anymore here. Merged-by: Clément Bœsch <cboesch@gopro.com>
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commit
78d16eb452
@ -1,37 +1,38 @@
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; /*
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; * SIMD optimized idct functions for HEVC decoding
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; * Copyright (c) 2014 Pierre-Edouard LEPERE
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; * Copyright (c) 2014 James Almer
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; *
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; * This file is part of FFmpeg.
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; *
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; * FFmpeg is free software; you can redistribute it and/or
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; * modify it under the terms of the GNU Lesser General Public
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; * License as published by the Free Software Foundation; either
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; * version 2.1 of the License, or (at your option) any later version.
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; *
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; * FFmpeg is distributed in the hope that it will be useful,
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; * but WITHOUT ANY WARRANTY; without even the implied warranty of
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; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; * Lesser General Public License for more details.
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; *
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; * You should have received a copy of the GNU Lesser General Public
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; * License along with FFmpeg; if not, write to the Free Software
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; * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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; */
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;*******************************************************************************
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;* SIMD-optimized IDCT functions for HEVC decoding
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;* Copyright (c) 2014 Pierre-Edouard LEPERE
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;* Copyright (c) 2014 James Almer
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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; void ff_hevc_idctHxW_dc_{8,10}_<opt>(int16_t *coeffs)
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; void ff_hevc_idct_HxW_dc_{8,10}_<opt>(int16_t *coeffs)
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; %1 = HxW
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; %2 = number of loops
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; %3 = bitdepth
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%macro IDCT_DC 3
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cglobal hevc_idct%1x%1_dc_%3, 1, 2, 1, coeff, tmp
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movsx tmpq, word [coeffq]
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add tmpw, ((1 << 14-%3) + 1)
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sar tmpw, (15-%3)
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cglobal hevc_idct_%1x%1_dc_%3, 1, 2, 1, coeff, tmp
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movsx tmpd, word [coeffq]
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add tmpd, (1 << (14 - %3)) + 1
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sar tmpd, (15 - %3)
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movd xm0, tmpd
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SPLATW m0, xm0
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DEFINE_ARGS coeff, cnt
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@ -41,11 +42,11 @@ cglobal hevc_idct%1x%1_dc_%3, 1, 2, 1, coeff, tmp
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mova [coeffq+mmsize*1], m0
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mova [coeffq+mmsize*2], m0
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mova [coeffq+mmsize*3], m0
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mova [coeffq+mmsize*4], m0
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mova [coeffq+mmsize*5], m0
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mova [coeffq+mmsize*6], m0
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mova [coeffq+mmsize*7], m0
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add coeffq, mmsize*8
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mova [coeffq+mmsize*-4], m0
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mova [coeffq+mmsize*-3], m0
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mova [coeffq+mmsize*-2], m0
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mova [coeffq+mmsize*-1], m0
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dec cntd
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jg .loop
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RET
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@ -54,10 +55,10 @@ cglobal hevc_idct%1x%1_dc_%3, 1, 2, 1, coeff, tmp
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; %1 = HxW
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; %2 = bitdepth
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%macro IDCT_DC_NL 2 ; No loop
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cglobal hevc_idct%1x%1_dc_%2, 1, 2, 1, coeff, tmp
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movsx tmpq, word [coeffq]
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add tmpw, ((1 << 14-%2) + 1)
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sar tmpw, (15-%2)
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cglobal hevc_idct_%1x%1_dc_%2, 1, 2, 1, coeff, tmp
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movsx tmpd, word [coeffq]
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add tmpd, (1 << (14 - %2)) + 1
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sar tmpd, (15 - %2)
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movd m0, tmpd
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SPLATW m0, xm0
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mova [coeffq+mmsize*0], m0
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@ -29,9 +29,6 @@
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#include <stdint.h>
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#define idct_dc_proto(size, bitd, opt) \
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void ff_hevc_idct##size##_dc_add_##bitd##_##opt(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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#define PEL_LINK(dst, idx1, idx2, idx3, name, D, opt) \
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dst[idx1][idx2][idx3] = ff_hevc_put_hevc_ ## name ## _ ## D ## _##opt; \
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dst ## _bi[idx1][idx2][idx3] = ff_hevc_put_hevc_bi_ ## name ## _ ## D ## _##opt; \
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@ -59,9 +59,9 @@ LFL_FUNCS(uint8_t, 10, avx)
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LFL_FUNCS(uint8_t, 12, avx)
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#define IDCT_FUNCS(W, opt) \
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void ff_hevc_idct##W##_dc_8_##opt(int16_t *coeffs); \
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void ff_hevc_idct##W##_dc_10_##opt(int16_t *coeffs); \
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void ff_hevc_idct##W##_dc_12_##opt(int16_t *coeffs)
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void ff_hevc_idct_ ## W ## _dc_8_ ## opt(int16_t *coeffs); \
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void ff_hevc_idct_ ## W ## _dc_10_ ## opt(int16_t *coeffs); \
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void ff_hevc_idct_ ## W ## _dc_12_ ## opt(int16_t *coeffs)
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IDCT_FUNCS(4x4, mmxext);
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IDCT_FUNCS(8x8, mmxext);
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@ -698,8 +698,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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if (bit_depth == 8) {
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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c->idct_dc[0] = ff_hevc_idct4x4_dc_8_mmxext;
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c->idct_dc[1] = ff_hevc_idct8x8_dc_8_mmxext;
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c->idct_dc[0] = ff_hevc_idct_4x4_dc_8_mmxext;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_8_mmxext;
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c->add_residual[0] = ff_hevc_add_residual4_8_mmxext;
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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@ -712,9 +712,9 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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}
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SAO_BAND_INIT(8, sse2);
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c->idct_dc[1] = ff_hevc_idct8x8_dc_8_sse2;
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c->idct_dc[2] = ff_hevc_idct16x16_dc_8_sse2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_8_sse2;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_8_sse2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_8_sse2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_8_sse2;
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c->add_residual[1] = ff_hevc_add_residual8_8_sse2;
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c->add_residual[2] = ff_hevc_add_residual16_8_sse2;
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@ -757,8 +757,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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c->sao_band_filter[1] = ff_hevc_sao_band_filter_16_8_avx2;
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}
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if (EXTERNAL_AVX2_FAST(cpu_flags)) {
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c->idct_dc[2] = ff_hevc_idct16x16_dc_8_avx2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_8_avx2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_8_avx2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_8_avx2;
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if (ARCH_X86_64) {
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c->put_hevc_epel[7][0][0] = ff_hevc_put_hevc_pel_pixels32_8_avx2;
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c->put_hevc_epel[8][0][0] = ff_hevc_put_hevc_pel_pixels48_8_avx2;
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@ -855,8 +855,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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} else if (bit_depth == 10) {
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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c->add_residual[0] = ff_hevc_add_residual4_10_mmxext;
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c->idct_dc[0] = ff_hevc_idct4x4_dc_10_mmxext;
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c->idct_dc[1] = ff_hevc_idct8x8_dc_10_mmxext;
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c->idct_dc[0] = ff_hevc_idct_4x4_dc_10_mmxext;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_10_mmxext;
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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c->hevc_v_loop_filter_chroma = ff_hevc_v_loop_filter_chroma_10_sse2;
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@ -868,9 +868,9 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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SAO_BAND_INIT(10, sse2);
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SAO_EDGE_INIT(10, sse2);
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c->idct_dc[1] = ff_hevc_idct8x8_dc_10_sse2;
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c->idct_dc[2] = ff_hevc_idct16x16_dc_10_sse2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_10_sse2;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_10_sse2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_10_sse2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_10_sse2;
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c->add_residual[1] = ff_hevc_add_residual8_10_sse2;
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c->add_residual[2] = ff_hevc_add_residual16_10_sse2;
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@ -904,8 +904,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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c->sao_band_filter[0] = ff_hevc_sao_band_filter_8_10_avx2;
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}
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if (EXTERNAL_AVX2_FAST(cpu_flags)) {
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c->idct_dc[2] = ff_hevc_idct16x16_dc_10_avx2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_10_avx2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_10_avx2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_10_avx2;
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if (ARCH_X86_64) {
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c->put_hevc_epel[5][0][0] = ff_hevc_put_hevc_pel_pixels16_10_avx2;
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c->put_hevc_epel[6][0][0] = ff_hevc_put_hevc_pel_pixels24_10_avx2;
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@ -1059,8 +1059,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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}
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} else if (bit_depth == 12) {
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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c->idct_dc[0] = ff_hevc_idct4x4_dc_12_mmxext;
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c->idct_dc[1] = ff_hevc_idct8x8_dc_12_mmxext;
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c->idct_dc[0] = ff_hevc_idct_4x4_dc_12_mmxext;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_12_mmxext;
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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c->hevc_v_loop_filter_chroma = ff_hevc_v_loop_filter_chroma_12_sse2;
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@ -1072,9 +1072,9 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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SAO_BAND_INIT(12, sse2);
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SAO_EDGE_INIT(12, sse2);
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c->idct_dc[1] = ff_hevc_idct8x8_dc_12_sse2;
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c->idct_dc[2] = ff_hevc_idct16x16_dc_12_sse2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_12_sse2;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_12_sse2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_12_sse2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_12_sse2;
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}
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if (EXTERNAL_SSSE3(cpu_flags) && ARCH_X86_64) {
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c->hevc_v_loop_filter_luma = ff_hevc_v_loop_filter_luma_12_ssse3;
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@ -1104,8 +1104,8 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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c->sao_band_filter[0] = ff_hevc_sao_band_filter_8_12_avx2;
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}
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if (EXTERNAL_AVX2_FAST(cpu_flags)) {
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c->idct_dc[2] = ff_hevc_idct16x16_dc_12_avx2;
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c->idct_dc[3] = ff_hevc_idct32x32_dc_12_avx2;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_12_avx2;
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c->idct_dc[3] = ff_hevc_idct_32x32_dc_12_avx2;
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SAO_BAND_INIT(12, avx2);
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SAO_EDGE_INIT(12, avx2);
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