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lavc/x86/hevc_add_res: Fix coeff overflow in ADD_RES_SSE_16_32_8
Fix overflow for coeff -32768 in function ADD_RES_SSE_16_32_8 with no performance drop.(SSE2/AVX/AVX2) ./checkasm --test=hevc_add_res --bench Mainline: - hevc_add_res.add_residual [OK] hevc_add_res_32x32_8_sse2: 127.5 hevc_add_res_32x32_8_avx: 127.0 hevc_add_res_32x32_8_avx2: 86.5 Add overflow test case: - hevc_add_res.add_residual [FAILED] After: - hevc_add_res.add_residual [OK] hevc_add_res_32x32_8_sse2: 126.8 hevc_add_res_32x32_8_avx: 128.3 hevc_add_res_32x32_8_avx2: 86.8 Signed-off-by: Xu Guangxin <guangxin.xu@intel.com> Signed-off-by: Linjie Fu <linjie.fu@intel.com> Signed-off-by: Anton Khirnov <anton@khirnov.net>
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@ -84,34 +84,36 @@ cglobal hevc_add_residual_4_8, 3, 3, 6
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%endmacro
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%macro ADD_RES_SSE_16_32_8 3
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mova xm2, [r1+%1]
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mova m1, [%2]
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mova m2, m1
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punpcklbw m1, m0
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punpckhbw m2, m0
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mova xm5, [r1+%1]
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mova xm6, [r1+%1+16]
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%if cpuflag(avx2)
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vinserti128 m2, m2, [r1+%1+32], 1
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vinserti128 m5, m5, [r1+%1+32], 1
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vinserti128 m6, m6, [r1+%1+48], 1
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%endif
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psubw m1, m0, m2
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psubw m5, m0, m6
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packuswb m2, m6
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packuswb m1, m5
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paddsw m1, m5
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paddsw m2, m6
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mova xm4, [r1+%1+mmsize*2]
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mova m3, [%3]
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mova m4, m3
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punpcklbw m3, m0
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punpckhbw m4, m0
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mova xm5, [r1+%1+mmsize*2]
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mova xm6, [r1+%1+mmsize*2+16]
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%if cpuflag(avx2)
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vinserti128 m4, m4, [r1+%1+96 ], 1
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vinserti128 m5, m5, [r1+%1+96], 1
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vinserti128 m6, m6, [r1+%1+112], 1
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%endif
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psubw m3, m0, m4
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psubw m5, m0, m6
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packuswb m4, m6
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packuswb m3, m5
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paddsw m3, m5
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paddsw m4, m6
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paddusb m2, [%2]
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paddusb m4, [%3]
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psubusb m2, m1
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psubusb m4, m3
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mova [%2], m2
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mova [%3], m4
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packuswb m1, m2
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packuswb m3, m4
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mova [%2], m1
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mova [%3], m3
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%endmacro
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