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arm: vp9itxfm: Skip empty slices in the first pass of idct_idct 16x16 and 32x32
This work is sponsored by, and copyright, Google.
Previously all subpartitions except the eob=1 (DC) case ran with
the same runtime:
Cortex A7 A8 A9 A53
vp9_inv_dct_dct_16x16_sub16_add_neon: 3188.1 2435.4 2499.0 1969.0
vp9_inv_dct_dct_32x32_sub32_add_neon: 18531.7 16582.3 14207.6 12000.3
By skipping individual 4x16 or 4x32 pixel slices in the first pass,
we reduce the runtime of these functions like this:
vp9_inv_dct_dct_16x16_sub1_add_neon: 274.6 189.5 211.7 235.8
vp9_inv_dct_dct_16x16_sub2_add_neon: 2064.0 1534.8 1719.4 1248.7
vp9_inv_dct_dct_16x16_sub4_add_neon: 2135.0 1477.2 1736.3 1249.5
vp9_inv_dct_dct_16x16_sub8_add_neon: 2446.7 1828.7 1993.6 1494.7
vp9_inv_dct_dct_16x16_sub12_add_neon: 2832.4 2118.3 2266.5 1735.1
vp9_inv_dct_dct_16x16_sub16_add_neon: 3211.7 2475.3 2523.5 1983.1
vp9_inv_dct_dct_32x32_sub1_add_neon: 756.2 456.7 862.0 553.9
vp9_inv_dct_dct_32x32_sub2_add_neon: 10682.2 8190.4 8539.2 6762.5
vp9_inv_dct_dct_32x32_sub4_add_neon: 10813.5 8014.9 8518.3 6762.8
vp9_inv_dct_dct_32x32_sub8_add_neon: 11859.6 9313.0 9347.4 7514.5
vp9_inv_dct_dct_32x32_sub12_add_neon: 12946.6 10752.4 10192.2 8280.2
vp9_inv_dct_dct_32x32_sub16_add_neon: 14074.6 11946.5 11001.4 9008.6
vp9_inv_dct_dct_32x32_sub20_add_neon: 15269.9 13662.7 11816.1 9762.6
vp9_inv_dct_dct_32x32_sub24_add_neon: 16327.9 14940.1 12626.7 10516.0
vp9_inv_dct_dct_32x32_sub28_add_neon: 17462.7 15776.1 13446.2 11264.7
vp9_inv_dct_dct_32x32_sub32_add_neon: 18575.5 17157.0 14249.3 12015.1
I.e. in general a very minor overhead for the full subpartition case due
to the additional loads and cmps, but a significant speedup for the cases
when we only need to process a small part of the actual input data.
In common VP9 content in a few inspected clips, 70-90% of the non-dc-only
16x16 and 32x32 IDCTs only have nonzero coefficients in the upper left
8x8 or 16x16 subpartitions respectively.
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Martin Storsjö
@@ -659,9 +659,8 @@ endfunc
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@ Read a vertical 4x16 slice out of a 16x16 matrix, do a transform on it,
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@ transpose into a horizontal 16x4 slice and store.
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@ r0 = dst (temp buffer)
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@ r1 = unused
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@ r1 = slice offset
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@ r2 = src
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@ r3 = slice offset
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function \txfm\()16_1d_4x16_pass1_neon
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mov r12, #32
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vmov.s16 q2, #0
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@@ -678,14 +677,14 @@ function \txfm\()16_1d_4x16_pass1_neon
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transpose16_q_4x_4x4 q8, q9, q10, q11, q12, q13, q14, q15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31
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@ Store the transposed 4x4 blocks horizontally.
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cmp r3, #12
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cmp r1, #12
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beq 1f
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.irp i, 16, 20, 24, 28, 17, 21, 25, 29, 18, 22, 26, 30, 19, 23, 27, 31
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vst1.16 {d\i}, [r0,:64]!
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.endr
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bx lr
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1:
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@ Special case: For the last input column (r3 == 12),
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@ Special case: For the last input column (r1 == 12),
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@ which would be stored as the last row in the temp buffer,
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@ don't store the first 4x4 block, but keep it in registers
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@ for the first slice of the second pass (where it is the
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@@ -781,15 +780,22 @@ endfunc
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itxfm16_1d_funcs idct
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itxfm16_1d_funcs iadst
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@ This is the minimum eob value for each subpartition, in increments of 4
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const min_eob_idct_idct_16, align=4
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.short 0, 10, 38, 89
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endconst
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.macro itxfm_func16x16 txfm1, txfm2
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function ff_vp9_\txfm1\()_\txfm2\()_16x16_add_neon, export=1
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.ifc \txfm1\()_\txfm2,idct_idct
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cmp r3, #1
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beq idct16x16_dc_add_neon
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.endif
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push {r4-r7,lr}
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push {r4-r8,lr}
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.ifnc \txfm1\()_\txfm2,idct_idct
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vpush {q4-q7}
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.else
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movrel r8, min_eob_idct_idct_16 + 2
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.endif
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@ Align the stack, allocate a temp buffer
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@@ -810,10 +816,36 @@ A and r7, sp, #15
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.irp i, 0, 4, 8, 12
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add r0, sp, #(\i*32)
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.ifc \txfm1\()_\txfm2,idct_idct
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.if \i > 0
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ldrh_post r1, r8, #2
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cmp r3, r1
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it le
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movle r1, #(16 - \i)/4
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ble 1f
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.endif
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.endif
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mov r1, #\i
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add r2, r6, #(\i*2)
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mov r3, #\i
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bl \txfm1\()16_1d_4x16_pass1_neon
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.endr
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.ifc \txfm1\()_\txfm2,idct_idct
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b 3f
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1:
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@ For all-zero slices in pass 1, set d28-d31 to zero, for the in-register
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@ passthrough of coefficients to pass 2 and clear the end of the temp buffer
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vmov.i16 q14, #0
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vmov.i16 q15, #0
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2:
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subs r1, r1, #1
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.rept 4
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vst1.16 {q14-q15}, [r0,:128]!
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.endr
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bne 2b
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3:
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.endif
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.ifc \txfm1\()_\txfm2,iadst_idct
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movrel r12, idct_coeffs
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vld1.16 {q0-q1}, [r12,:128]
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@@ -830,7 +862,7 @@ A and r7, sp, #15
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.ifnc \txfm1\()_\txfm2,idct_idct
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vpop {q4-q7}
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.endif
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pop {r4-r7,pc}
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pop {r4-r8,pc}
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endfunc
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.endm
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@@ -1110,11 +1142,16 @@ function idct32_1d_4x32_pass2_neon
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bx lr
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endfunc
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const min_eob_idct_idct_32, align=4
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.short 0, 9, 34, 70, 135, 240, 336, 448
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endconst
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function ff_vp9_idct_idct_32x32_add_neon, export=1
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cmp r3, #1
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beq idct32x32_dc_add_neon
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push {r4-r7,lr}
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push {r4-r8,lr}
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vpush {q4-q7}
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movrel r8, min_eob_idct_idct_32 + 2
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@ Align the stack, allocate a temp buffer
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T mov r7, sp
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@@ -1129,9 +1166,29 @@ A and r7, sp, #15
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.irp i, 0, 4, 8, 12, 16, 20, 24, 28
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add r0, sp, #(\i*64)
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.if \i > 0
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ldrh_post r1, r8, #2
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cmp r3, r1
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it le
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movle r1, #(32 - \i)/2
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ble 1f
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.endif
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add r2, r6, #(\i*2)
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bl idct32_1d_4x32_pass1_neon
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.endr
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b 3f
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1:
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@ Write zeros to the temp buffer for pass 2
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vmov.i16 q14, #0
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vmov.i16 q15, #0
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2:
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subs r1, r1, #1
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.rept 4
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vst1.16 {q14-q15}, [r0,:128]!
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.endr
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bne 2b
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3:
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.irp i, 0, 4, 8, 12, 16, 20, 24, 28
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add r0, r4, #(\i)
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mov r1, r5
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@@ -1141,5 +1198,5 @@ A and r7, sp, #15
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add sp, sp, r7
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vpop {q4-q7}
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pop {r4-r7,pc}
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pop {r4-r8,pc}
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endfunc
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@@ -272,8 +272,10 @@ static void check_itxfm(void)
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// skip testing sub-IDCTs for WHT or ADST since they don't
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// implement it in any of the SIMD functions. If they do,
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// consider changing this to ensure we have complete test
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// coverage
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for (sub = (txtp == 0 && tx < 4) ? 1 : sz; sub <= sz; sub <<= 1) {
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// coverage. Test sub=1 for dc-only, then 2, 4, 8, 12, etc,
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// since the arm version can distinguish them at that level.
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for (sub = (txtp == 0 && tx < 4) ? 1 : sz; sub <= sz;
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sub < 4 ? (sub <<= 1) : (sub += 4)) {
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if (check_func(dsp.itxfm_add[tx][txtp],
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"vp9_inv_%s_%dx%d_sub%d_add",
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tx == 4 ? "wht_wht" : txtp_types[txtp],
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