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lavc/opusdsp: RISC-V V (512-bit) postfilter
This adds a variant of the postfilter for use with 512-bit vectors. Half a vector is enough to perform the scalar product. Normally a whole vector would be used anyhow. Indeed fractional multiplers are no faster than the unit multipler. But in this particular function, a full vector makes up 16 samples, which would be loaded at each iteration of the outer loop. The minimum guaranteed CELT postfilter period is only 15. Accounting for the edges, we can only safely preload up to 13 samples. The fractional multipler is thus used to cap the selected vector length to a safe value of 8 elements or 256 bits. Likewise, we have the 1024-bit variant with the quarter multipler. In theory, a 2048-bit one would be possible with the eigth multipler, but that length is not even defined in the specifications as of yet, nor is it supported by any emulator - forget actual hardware.
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@ -27,6 +27,8 @@
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void ff_opus_postfilter_rvv_128(float *data, int period, float *g, int len);
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void ff_opus_postfilter_rvv_256(float *data, int period, float *g, int len);
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void ff_opus_postfilter_rvv_512(float *data, int period, float *g, int len);
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void ff_opus_postfilter_rvv_1024(float *data, int period, float *g, int len);
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av_cold void ff_opus_dsp_init_riscv(OpusDSP *d)
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{
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@ -41,6 +43,12 @@ av_cold void ff_opus_dsp_init_riscv(OpusDSP *d)
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case 32:
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d->postfilter = ff_opus_postfilter_rvv_256;
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break;
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case 64:
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d->postfilter = ff_opus_postfilter_rvv_512;
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break;
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case 128:
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d->postfilter = ff_opus_postfilter_rvv_512;
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break;
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}
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#endif
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}
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@ -25,6 +25,16 @@ func ff_opus_postfilter_rvv_128, zve32f
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j 1f
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endfunc
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func ff_opus_postfilter_rvv_512, zve32f
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lvtypei a5, e32, mf2, ta, ma
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j 1f
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endfunc
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func ff_opus_postfilter_rvv_1024, zve32f
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lvtypei a5, e32, mf4, ta, ma
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j 1f
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endfunc
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func ff_opus_postfilter_rvv_256, zve32f
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lvtypei a5, e32, m1, ta, ma
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1:
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