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Code Issues Releases Activity

lavu/floatdsp: RISC-V V vector_fmac_scalar

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Rémi Denis-Courmont 2022-09-26 17:52:32 +03:00 committed by Lynne
parent da169a210d
commit c3db27ba95
2 changed files with 22 additions and 0 deletions
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3
libavutil/riscv/float_dsp_init.c
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@ -27,6 +27,8 @@
void ff_vector_fmul_rvv(float *dst, const float *src0, const float *src1,
int len);
void ff_vector_fmac_scalar_rvv(float *dst, const float *src, float mul,
int len);
void ff_vector_fmul_scalar_rvv(float *dst, const float *src, float mul,
int len);
@ -42,6 +44,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp)
if (flags & AV_CPU_FLAG_RVV_F32) {
fdsp->vector_fmul = ff_vector_fmul_rvv;
fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_rvv;
fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_rvv;
}

19
libavutil/riscv/float_dsp_rvv.S
View File

@ -38,6 +38,25 @@ func ff_vector_fmul_rvv, zve32f
ret
endfunc
// (a0) += (a1) * fa0 [0..a2-1]
func ff_vector_fmac_scalar_rvv, zve32f
NOHWF fmv.w.x fa0, a2
NOHWF mv a2, a3
1:
vsetvli t0, a2, e32, m1, ta, ma
slli t1, t0, 2
vle32.v v24, (a1)
sub a2, a2, t0
vle32.v v16, (a0)
sh2add a1, t0, a1
vfmacc.vf v16, fa0, v24
vse32.v v16, (a0)
sh2add a0, t0, a0
bnez a2, 1b
ret
endfunc
// (a0) = (a1) * fa0 [0..a2-1]
func ff_vector_fmul_scalar_rvv, zve32f
NOHWF fmv.w.x fa0, a2