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mips: intreadwrite: Only execute that code for mips r1 or r2

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MIPS R6 supports unaligned memory access and does not have
the load/store-left/right family of instructions.

Signed-off-by: Vicente Olivert Riera <Vincent.Riera at imgtec.com>
Signed-off-by: Luca Barbato <lu_zero at gentoo.org>
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
This commit is contained in:
Vicente Olivert Riera 2015-09-25 08:56:25 +02:00 committed by Luca Barbato
parent 1016a75cf3
commit d00bb8addc
1 changed files with 8 additions and 2 deletions
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10
libavutil/mips/intreadwrite.h
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@ -24,7 +24,13 @@
#include <stdint.h>
#include "config.h"
#if ARCH_MIPS64 && HAVE_INLINE_ASM
/*
* GCC actually handles unaligned accesses correctly in all cases
* except, absurdly, 32-bit loads on mips64.
*
* https://git.libav.org/?p=libav.git;a=commit;h=b82b49a5b774b6ad9119e981c72b8f594fee2ae0
*/
#if HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE
#define AV_RN32 AV_RN32
static av_always_inline uint32_t AV_RN32(const void *p)
@ -41,6 +47,6 @@ static av_always_inline uint32_t AV_RN32(const void *p)
return v;
}
#endif /* ARCH_MIPS64 && HAVE_INLINE_ASM */
#endif /* HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE */
#endif /* AVUTIL_MIPS_INTREADWRITE_H */