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avcodec/x86/lossless_videodsp: Remove obsolete MMX(EXT) functions
The only systems which benefit from these are truely ancient 32bit x86s as all other systems use at least the SSE2 versions (this includes all x64 cpus (which is why this code is restricted to x86-32)). Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
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@ -38,11 +38,11 @@ pb_zzzzzzzz67676767: db -1,-1,-1,-1,-1,-1,-1,-1, 6, 7, 6, 7, 6, 7, 6, 7
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SECTION .text
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;------------------------------------------------------------------------------
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; void ff_add_median_pred_mmxext(uint8_t *dst, const uint8_t *top,
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; const uint8_t *diff, int w,
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; int *left, int *left_top)
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; void ff_add_median_pred(uint8_t *dst, const uint8_t *top,
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; const uint8_t *diff, int w,
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; int *left, int *left_top)
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;------------------------------------------------------------------------------
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%macro MEDIAN_PRED 0
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INIT_XMM sse2
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cglobal add_median_pred, 6,6,8, dst, top, diff, w, left, left_top
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movu m0, [topq]
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mova m2, m0
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@ -100,14 +100,6 @@ cglobal add_median_pred, 6,6,8, dst, top, diff, w, left, left_top
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movzx r2d, byte [topq-1]
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mov [left_topq], r2d
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RET
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%endmacro
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%if ARCH_X86_32
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INIT_MMX mmxext
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MEDIAN_PRED
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%endif
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INIT_XMM sse2
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MEDIAN_PRED
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%macro ADD_LEFT_LOOP 2 ; %1 = dst_is_aligned, %2 = src_is_aligned
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@ -240,10 +232,6 @@ cglobal add_bytes, 3,4,2, dst, src, w, size
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REP_RET
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%endmacro
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%if ARCH_X86_32
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INIT_MMX mmx
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ADD_BYTES
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%endif
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INIT_XMM sse2
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ADD_BYTES
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@ -19,17 +19,12 @@
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*/
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#include "config.h"
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#include "libavutil/x86/asm.h"
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#include "../lossless_videodsp.h"
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#include "libavutil/x86/cpu.h"
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void ff_add_bytes_mmx(uint8_t *dst, uint8_t *src, ptrdiff_t w);
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void ff_add_bytes_sse2(uint8_t *dst, uint8_t *src, ptrdiff_t w);
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void ff_add_bytes_avx2(uint8_t *dst, uint8_t *src, ptrdiff_t w);
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void ff_add_median_pred_mmxext(uint8_t *dst, const uint8_t *top,
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const uint8_t *diff, ptrdiff_t w,
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int *left, int *left_top);
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void ff_add_median_pred_sse2(uint8_t *dst, const uint8_t *top,
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const uint8_t *diff, ptrdiff_t w,
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int *left, int *left_top);
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@ -47,63 +42,10 @@ int ff_add_left_pred_int16_unaligned_ssse3(uint16_t *dst, const uint16_t *src, u
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void ff_add_gradient_pred_ssse3(uint8_t *src, const ptrdiff_t stride, const ptrdiff_t width);
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void ff_add_gradient_pred_avx2(uint8_t *src, const ptrdiff_t stride, const ptrdiff_t width);
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#if HAVE_INLINE_ASM && HAVE_7REGS && ARCH_X86_32
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static void add_median_pred_cmov(uint8_t *dst, const uint8_t *top,
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const uint8_t *diff, ptrdiff_t w,
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int *left, int *left_top)
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{
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x86_reg w2 = -w;
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x86_reg x;
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int l = *left & 0xff;
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int tl = *left_top & 0xff;
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int t;
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__asm__ volatile (
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"mov %7, %3 \n"
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"1: \n"
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"movzbl (%3, %4), %2 \n"
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"mov %2, %k3 \n"
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"sub %b1, %b3 \n"
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"add %b0, %b3 \n"
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"mov %2, %1 \n"
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"cmp %0, %2 \n"
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"cmovg %0, %2 \n"
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"cmovg %1, %0 \n"
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"cmp %k3, %0 \n"
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"cmovg %k3, %0 \n"
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"mov %7, %3 \n"
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"cmp %2, %0 \n"
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"cmovl %2, %0 \n"
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"add (%6, %4), %b0 \n"
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"mov %b0, (%5, %4) \n"
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"inc %4 \n"
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"jl 1b \n"
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: "+&q"(l), "+&q"(tl), "=&r"(t), "=&q"(x), "+&r"(w2)
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: "r"(dst + w), "r"(diff + w), "rm"(top + w)
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);
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*left = l;
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*left_top = tl;
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}
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#endif
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void ff_llviddsp_init_x86(LLVidDSPContext *c)
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{
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int cpu_flags = av_get_cpu_flags();
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#if HAVE_INLINE_ASM && HAVE_7REGS && ARCH_X86_32
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if (cpu_flags & AV_CPU_FLAG_CMOV)
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c->add_median_pred = add_median_pred_cmov;
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#endif
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if (ARCH_X86_32 && EXTERNAL_MMX(cpu_flags)) {
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c->add_bytes = ff_add_bytes_mmx;
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}
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if (ARCH_X86_32 && EXTERNAL_MMXEXT(cpu_flags)) {
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/* slower than cmov version on AMD */
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if (!(cpu_flags & AV_CPU_FLAG_3DNOW))
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c->add_median_pred = ff_add_median_pred_mmxext;
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}
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if (EXTERNAL_SSE2(cpu_flags)) {
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c->add_bytes = ff_add_bytes_sse2;
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c->add_median_pred = ff_add_median_pred_sse2;
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