Commit Graph
100 Commits
Author SHA1 Message Date
Lynne 710d83bdde lavu/tx: zero-out imaginary of last coefficient in forward RDFTs
We didn't do this, because it's zero anyway, but it prevents users from using
uninitialized memory in calculations.
2022-12-03 21:02:00 +01:00
LynneandHendrik Leppkes 90c17a05aa x86/tx_float: fix stray change in 15xM FFT and replace imul->lea
Thanks to rorgoroth for bisecting and kurosu for the lea suggestion.
2022-11-28 16:58:12 +01:00
Lynne e97368eba5 lavu: bump minor and add APIchanges entry for lavu/tx DCT 2022-11-24 15:58:36 +01:00
Lynne ca8aaf24df binkaudio: convert to lavu/tx 2022-11-24 15:58:36 +01:00
Lynne a56d7e0ca3 lavu/tx: add DCT-III implementation 2022-11-24 15:58:36 +01:00
Lynne 504b7bec1a lavu/tx: add DCT-II implementation 2022-11-24 15:58:35 +01:00
Lynne 93c30bd6f0 lavu/tx: clarify stride for RDFT transforms 2022-11-24 15:58:35 +01:00
Lynne 43d285a40f lavu/tx: fix last coefficient scaling for R2C transforms
This was a typo.
2022-11-24 15:58:35 +01:00
Lynne 8547123f3b lavu/tx: generalize PFA FFTs
This commit permits any stacking of FFTs of any size.
2022-11-24 15:58:34 +01:00
Lynne 7f019e7758 lavu/tx: add length decomposition function
Rather than using a list of lengths supported, this goes a step beyond
and uses all registered codelets to come up with a good decomposition.
2022-11-24 15:58:34 +01:00
Lynne 87bae6b018 lavu/tx: refactor to explicitly track and convert lookup table order
Necessary for generalizing PFAs.
2022-11-24 15:58:34 +01:00
Lynne 1c8d77a2bf lavu/tx: refactor and separate codelet list and prio code 2022-11-24 15:58:33 +01:00
Lynne 958b3760b5 lavu/tx: improve transform tree logging
Now prints the actual codelet size used, as well as the number of
allowed factors.
2022-11-24 15:58:33 +01:00
Lynne 6ddd10c3e2 lavu/tx: allow codelets to specify a minimum number of matching factors 2022-11-24 15:58:33 +01:00
Lynne dd77e61182 lavu/tx: add ff_tx_clear_ctx()
This function allows implementations to clean up a context after
successfully initializing subcontexts.
2022-11-24 15:58:32 +01:00
Lynne fab97faf02 x86/tx_float: implement striding in fft_15xM 2022-11-24 15:58:32 +01:00
Lynne 92100eee5b x86/tx_float_init: properly specify the supported factors of 15xM FFTs
Only powers of two are currently supported.
2022-11-24 15:58:32 +01:00
Lynne cc1df4045e x86/tx_float: add a standalone 15-point AVX2 transform
Enables its use everywhere else in the framework.
2022-11-24 15:58:31 +01:00
Lynne 877e575b5d x86/tx_float: optimize and macro out FFT15 2022-11-24 15:58:31 +01:00
Lynne fbe4fd992f lavu/tx: support output stride in naive transforms
Allows them to be used in general PFAs.
2022-11-24 15:58:31 +01:00
Lynne 68cabf8750 lavu/tx: add fft_inplace_small transforms
This is much faster than the loop.
2022-11-24 15:58:30 +01:00
Lynne d4e39cae2e lavu/tx: drop requirement of input == output for in-place transforms
No longer necessary.
2022-11-24 15:58:30 +01:00
Lynne fff3e1d848 lavu/tx: support out-of-place transforms in fft_inplace
This makes testing easier, as a unified path can be used for in/out of
place transforms.
2022-11-24 15:58:30 +01:00
Lynne d260796f11 lavu/tx: make C ptwo transforms in+out of place
We assume that _all_ in-place transforms can operate out of place,
which isn't true, because the C ptwo transforms were always in-place (dst).
2022-11-24 15:58:29 +01:00
Lynne 37008dc402 lavu/tx: add naive_small FFT
The same as naive but with precomputed tables. Makes it more useful
for odd-factors we don't support yet.
2022-11-24 15:58:29 +01:00
Lynne e8a9b7b298 lavu/tx: list all odd-length FFT factors as regular codelets
Allows them to be picked just like any other transform.
2022-11-24 15:58:28 +01:00
Lynne 45bd4bf79f lavu/tx: generalize single-factor transforms
Not that useful, but it gives us fast small odd-length transforms.
2022-11-24 15:58:28 +01:00
Lynne 79f11e2409 lavu/tx: make prime factor transforms truly in-place
They all overwrote in[0] and then used it as a DC.
2022-11-24 15:58:28 +01:00
Lynne d556f6fa9b fate/aacenc: increase tolerance for ln-128k test
The encoder is sensitive to changes in precision, and its test target
was a compromise. It was already close to failing on x87 FPUs.
ff_mdct_init used double precision entirely from the scale to computing
the MDCT exp tables. av_tx_init uses single-precision for the scale,
with a small input change which was enough to tip the test into failing on
x87 FPUs.

Increase the fuzz factor in line with other AAC encoder tests to fix.
2022-11-24 15:58:22 +01:00
Lynne a07c8781ce mips/aacsbr: port to lavu/tx
Fixes compilation after the recent commit which ported the C code to lavu/tx.
2022-11-06 17:37:21 +01:00
Lynne 76d0038579 lavc: deprecate avcodec_dct, av_fft, av_dct, av_rdft and av_mdct
Replaced by lavu/tx. Dedicated code soon to be removed, replaced with
a simple wrapper code.
2022-11-06 14:39:42 +01:00
Lynne 1aeedd277a qdm2: convert to lavu/tx 2022-11-06 14:39:42 +01:00
Lynne e6afa61be9 imc: convert to lavu/tx, remove NIH iMDCT and replace with a standard one 2022-11-06 14:39:42 +01:00
Lynne b85e106d5f libavcodec: remove mdct15
It's not needed nor used by anything anymore, lavu/tx is faster,
and better in every way. RIP.
2022-11-06 14:39:41 +01:00
Lynne 774ea6a00b vorbisenc: convert to lavu/tx 2022-11-06 14:39:41 +01:00
Lynne 34330adb29 atrac3plus: convert to lavu/tx 2022-11-06 14:39:40 +01:00
Lynne b59e6b5d99 atrac3: convert to lavu/tx 2022-11-06 14:39:40 +01:00
Lynne 5f52094f3d atrac1: convert to lavu/tx 2022-11-06 14:39:39 +01:00
Lynne 978963a77b wma: convert to lavu/tx
Converts both the decoder and encoders.
2022-11-06 14:39:39 +01:00
Lynne 6ba0aa1770 on2avc: convert to lavu/tx 2022-11-06 14:39:38 +01:00
Lynne 8cd46c48ac nellymoserenc: convert to lavu/tx 2022-11-06 14:39:38 +01:00
Lynne 61e1a7d958 nellymoserdec: convert to lavu/tx 2022-11-06 14:39:38 +01:00
Lynne b428003c1c dcaenc: convert to lavu/tx
The encoder is fixed point, and uses an MDCT only for analysis. Due
to the slightly different rounding, the encoder makes a different
decision, so the tests have to be adjusted as well.
2022-11-06 14:39:37 +01:00
Lynne 055413788f dca_lbr: convert to lavu/tx
Fully converts the DCA decoder to lavu/tx.
2022-11-06 14:39:37 +01:00
Lynne e0661fc805 dca_core: convert to lavu/tx
Thanks to Martin Storsjö <martin@martin.st> for fixing and testing the
arm32 and aarch64 changes.
2022-11-06 14:39:36 +01:00
Lynne 2689038f08 dolby_e: convert to lavu/tx 2022-11-06 14:39:36 +01:00
Lynne 1d810b650c cookdec: convert to lavu/tx 2022-11-06 14:39:36 +01:00
Lynne 8f3e062314 aacenc: convert to lavu/tx 2022-11-06 14:39:35 +01:00
Lynne fbe6a51b11 aacsbr: convert to lavu/tx 2022-11-06 14:39:35 +01:00
Lynne 5f1111e42e wmaprodec: convert to lavu/tx 2022-11-06 14:39:34 +01:00
Lynne eb0e25f078 atrac9dec: convert to lavu/tx 2022-11-06 14:39:34 +01:00
Lynne 7af43a46d9 twinvq: convert to lavu/tx 2022-11-06 14:39:33 +01:00
Lynne 60c704677a vorbisdec: convert to lavu/tx
This also fixes not checking the return values on transform init.

Total decoder speedup on Zen 3: 9%
2022-11-06 14:39:33 +01:00
Lynne 469cd8d7fa aacdec: convert to lavu/tx and support fixed-point 960-sample decoding
This patch replaces the transform used in AAC with lavu/tx and removes
the limitation on only being able to decode 960-sample files
with the float decoder.
This commit also removes a whole bunch of unnecessary and slow
lifting steps the decoder did to compensate for the poor accuracy
of the old integer transformation code.

Overall float decoder speedup on Zen 3 for 64kbps: 32%
2022-11-06 14:39:33 +01:00
Lynne 4cee7ebd75 ac3: convert to lavu/tx 2022-11-06 14:39:27 +01:00
Lynne bd3e552549 lavu: bump minor and add APIChanges entry for RISC-V's RVBbasic 2022-10-05 08:31:15 +02:00
Lynne b25c6a5704 riscv/alacdsp: drop config.h include 2022-10-05 06:59:43 +02:00
Lynne 0bc7ba4488 configure: remove mdct15 from the encoder/decoder's list of requirements 2022-09-28 00:08:48 +02:00
Lynne 543a46b4b2 opus: convert encoder and decoder to lavu/tx
This commit changes both the encoder and decoder to use the new lavu/tx code,
which has faster C transforms and more assembly optimizations.
2022-09-26 20:26:54 +02:00
Lynne f21899db7d x86/tx_float: enable AVX-only split-radix FFT codelets
Sandy Bridge, Ivy Bridge and Bulldozer cores don't support FMA3.
2022-09-24 04:16:55 +02:00
Lynne e7a987d7c9 lavu/tx: remove special -1 inverted lookup mode
It was somewhat hacky and unnecessary.
2022-09-23 12:35:28 +02:00
Lynne 74e8541bab x86/tx_float: generalize iMDCT
To support non-aligned buffers during the post-transform step, just iterate
backwards over the array.

This allows using the 15xN-point FFT, with which the speed is 2.1 times
faster than our old libavcodec implementation.
2022-09-23 12:35:28 +02:00
Lynne ace42cf581 x86/tx_float: add 15xN PFA FFT AVX SIMD
~4x faster than the C version.
The shuffles in the 15pt dim1 are seriously expensive. Not happy with it,
but I'm contempt.

Can be easily converted to pure AVX by removing all vpermpd/vpermps
instructions.
2022-09-23 12:35:27 +02:00
Lynne 3241e9225c x86/tx_float: adjust internal ASM call ABI again
There are many ways to go about it, and this one seems optimal for both
MDCTs and PFA FFTs without requiring excessive instructions or stack usage.
2022-09-23 12:33:35 +02:00
Lynne 7e7baf8ab8 lavu/tx: do not steal lookup tables of subcontexts in the iMDCT
As it happens, some still need their contexts.
2022-09-23 12:33:31 +02:00
Lynne 668f43af20 tests/checkasm/lpc: correct arithmetic when randomizing buffers
Results weren't signed.
2022-09-23 01:50:59 +02:00
Lynne 6ad39f01df tests/checkasm/lpc: reduce range and use signed values
This is more similar to its regular use, and prevents inaccuracies
of huge float*float multiplications from failing the tests.
2022-09-23 01:42:34 +02:00
Lynne f2d75d7fb0 fate/checkasm: add LPC test to list 2022-09-22 04:27:20 +02:00
Lynne b67776e12f x86/lpc: fix even scalar loop overreads/writes
Passes checkasm with valgrind, tested to sizes of more than 4000 samples.
2022-09-22 04:27:19 +02:00
Lynne dea944b838 x86/lpc: fix odd scalar loop overreads/writes 2022-09-22 03:07:41 +02:00
Lynne 3ade6a8644 x86/lpc: implement a new Welch windowing function
Old one was written with the assumption only even inputs would be given.
This very messy replacement supports even and odd inputs, and supports
AVX2 for extra speed. The buffers given are usually quite big (4k samples),
so the speedup is worth it.
The new SSE version is still faster than the old inline asm version by 33%.

Also checkasm is provided to make sure this monstrosity works.

This fixes some FATE tests.
2022-09-21 07:12:39 +02:00
Lynne cc367a9b8a lavc/lpc: do not explode when windowing a 1-length array
Divided by 0.
2022-09-21 07:09:36 +02:00
Lynne 4ba68639ca x86/tx_float: add asm call versions of the 2pt and 4pt transforms
Verified to be working.
2022-09-19 06:01:06 +02:00
Lynne 892548e6a1 x86/tx_float: fully support 128bit regs in LOAD64_LUT
The gather path didn't support 128bit registers.
It's not faster on Zen 3, but it's here for completeness.
2022-09-19 06:01:04 +02:00
Lynne af42bb3d61 x86/tx_float: simplify and describe the intra-asm call convention 2022-09-19 06:01:02 +02:00
Lynne f1b35fc8f0 lavu/tx: remove av_cold from table definitions
How did this get here?
2022-09-11 03:18:40 +02:00
Lynne c92edd969a lavu/tx: rotate 3 & 15-point exptabs
This just inverts their signs. Simplifies SIMD.
2022-09-10 02:37:17 +02:00
Lynne 51172223fd lavu/tx: generalize MDCTs
The same code can perform any-length MDCTs with minimal changes.
2022-09-10 02:37:16 +02:00
Lynne 645a1f4422 lavu/tx: add the inplace flag to PFA FFTs
They support in-place, because they have to use a temporary buffer.
2022-09-10 02:37:14 +02:00
Lynne 8c283e8fe6 lavu/tx: propagate the codelet flags into the context
The field is documented as a combination of both.
2022-09-10 02:37:11 +02:00
Lynne a89025f74d aarch64/tx_float: fix compilation
Forgot to add the new function arguments.
2022-09-06 05:42:32 +02:00
Lynne 9a9647af33 checkasm/tx: add checkasm support for the iMDCT 2022-09-06 04:21:49 +02:00
Lynne 4537d9554d x86/tx_float: implement inverse MDCT AVX2 assembly
This commit implements an iMDCT in pure assembly.

This is capable of processing any mod-8 transforms, rather than just
power of two, but since power of two is all we have assembly for
currently, that's what's supported.
It would really benefit if we could somehow use the C code to decide
which function to jump into, but exposing function labels from assebly
into C is anything but easy.
The post-transform loop could probably be improved.

This was somewhat annoying to write, as we must support arbitrary
strides during runtime. There's a fast branch for stride == 4 bytes
and a slower one which uses vgatherdps.

Zen 3 benchmarks for stride == 4 for old (av_imdct_half) vs new (av_tx):

128pt:
   2811 decicycles in         av_tx (imdct),16775916 runs,   1300 skips
   3082 decicycles in         av_imdct_half,16776751 runs,    465 skips

256pt:
   4920 decicycles in         av_tx (imdct),16775820 runs,   1396 skips
   5378 decicycles in         av_imdct_half,16776411 runs,    805 skips

512pt:
   9668 decicycles in         av_tx (imdct),16775774 runs,   1442 skips
  10626 decicycles in         av_imdct_half,16775647 runs,   1569 skips

1024pt:
  19812 decicycles in         av_tx (imdct),16777144 runs,     72 skips
  23036 decicycles in         av_imdct_half,16777167 runs,     49 skips
2022-09-06 04:21:46 +02:00
Lynne 2425d5cd7e x86/tx_float: add support for calling assembly functions from assembly
Needed for the next patch.
We get this for the extremely small cost of a branch on _ns functions,
which wouldn't be used anyway with assembly.
2022-09-06 04:21:41 +02:00
Lynne f99d15cca0 arm/fft: disable NEON optimizations for 131072pt transforms
This has been broken since the start, and it was only discovered
when I started testing my replacement for the FFT.
Disable it, since there's no point in fixing slower code that's about
to be removed anyway.

The vfp version is not affected.
2022-08-29 07:13:43 +02:00
Lynne f932b89ea3 lavu/tx: implement aarch64 NEON SIMD FFT
The fastest fast Fourier transform in not just the west, but the world,
now for the most popular toy ISA.

On a high level, it follows the design of the AVX2 version closely,
with the exception that the input is slightly less permuted as we don't have
to do lane switching with the input on double 4pt and 8pt.

On a low level, the lack of subadd/addsub instructions REALLY penalizes
any attempt at writing an FFT. That single register matters a lot,
and reloading it simply takes unacceptably long.
In x86 land, vendors would've noticed developers need this.
In ARM land, you get a badly designed complex multiplication instruction
we cannot use, that's not present on 95% of devices. Because only
compilers matter, right?

Future optimization options are very few, perhaps better register
management to use more ld1/st1s.

All timings below are in cycles:
A53:
Length | C           | New (lavu)  | Old (lavc)  | FFTW
------ |-------------|-------------|-------------|-----
4      |         842 | 420         | 1210        | 1460
8      |        1538 | 1020        | 1850        | 2520
16     |        3717 | 1900        | 3700        | 3990
32     |        9156 | 4070        | 8289        | 8860
64     |       21160 | 9931        | 18600       | 19625
128    |       49180 | 23278       | 41922       | 41922
256    |      112073 | 53876       | 93202       | 101092
512    |      252864 | 122884      | 205897      | 207868
1024   |      560512 | 278322      | 458071      | 453053
2048   |     1295402 | 775835      | 1038205     | 1020265
4096   |     3281263 | 2021221     | 2409718     | 2577554
8192   |     8577845 | 4780526     | 5673041     | 6802722

Apple M1
New  - Total for len 512 reps 2097152 = 1.459141 s
Old  - Total for len 512 reps 2097152 = 2.251344 s
FFTW - Total for len 512 reps 2097152 = 1.868429 s

New  - Total for len 1024 reps 4194304 = 6.490080 s
Old  - Total for len 1024 reps 4194304 = 9.604949 s
FFTW - Total for len 1024 reps 4194304 = 7.889281 s

New  - Total for len 16384 reps 262144 = 10.374001 s
Old  - Total for len 16384 reps 262144 = 15.266713 s
FFTW - Total for len 16384 reps 262144 = 12.341745 s

New  - Total for len 65536 reps 8192 = 1.769812 s
Old  - Total for len 65536 reps 8192 = 4.209413 s
FFTW - Total for len 65536 reps 8192 = 3.012365 s

New  - Total for len 131072 reps 4096 = 1.942836 s
Old  - Segfaults
FFTW - Total for len 131072 reps 4096 = 3.713713 s

Thanks to wbs for some simplifications, assembler fixes and a review
and to jannau for giving it a look.
2022-08-25 17:40:28 +02:00
Lynne ae66a9db7b lavu/tx: optimize and simplify inverse MDCTs
Convert the input from a scatter to a gather instead,
which is faster and better for SIMD.
Also, add a pre-shuffled exptab version to avoid
gathering there at all. This doubles the exptab size,
but the speedup makes it worth it. In SIMD, the
exptab will likely be purged to a higher cache
anyway because of the FFT in the middle, and
the amount of loads stays identical.

For a 960-point inverse MDCT, the speedup is 10%.

This makes it possible to write sane and fast SIMD
versions of inverse MDCTs.
2022-08-16 01:22:38 +02:00
Lynne 98b32ef462 x86/tx_float: save a branch during coefficient deinterleaving
Directly branch into the special 64-point deinterleave
subroutine rather than going through the general deinterleave.

64-point transform timings on Zen 3:
Before:
   1974 decicycles in           av_tx (fft),16776864 runs,    352 skips
After:
   1956 decicycles in           av_tx (fft),16775378 runs,   1838 skips
2022-08-09 03:35:12 +02:00
Lynne f9dd8fcf9b )hwcontext: add a stub implementation for Vulkan functions 2022-07-05 15:20:08 +02:00
Lynne 27cffd16aa x86/tx_float: replace fft_sr_avx with fft_sr_fma3
When the SLOW_GATHER flag was added to the AVX2 version, this
made FMA3-features not enabled on Zen CPUs.
As FMA3 adds 6-7% across all platforms that support it, in
the interest of saving space, this commit removes the AVX
version and replaces it with an FMA3 version.
The only CPUs affected are Sandy Bridge and Bulldozer, which
have AVX support, but no FMA3 support.
In the future, if there's a demand for it, a version of the
function duplicated for AVX can be added.
2022-05-21 02:11:50 +02:00
Lynne 0938ff9701 x86/tx_float: improve temporary register allocation for loads
On Zen 3:

Before:
1484285 decicycles in           av_tx (fft),  131072 runs,      0 skips

After:
1415243 decicycles in           av_tx (fft),  131072 runs,      0 skips
2022-05-21 02:11:45 +02:00
Lynne 805e8d1921 lavu/tx: make slow ISA extension penalties smarter
Instead of having a fixed -64 prio penalty, make the penalties
more granular.
As the prio is based on the register size in bits, decrementing
it by 129 makes AVX SLOW functions be avoided in favor of any
SSE versions.
2022-05-21 02:10:14 +02:00
Lynne 19c0bb2aa9 x86/tx_float: add AV_CPU_FLAG_AVXSLOW/SLOW_GATHER flags where appropriate 2022-05-21 02:10:09 +02:00
Lynne 9e94c35941 Revert "x86/tx_float: remove vgatherdpd usage"
This reverts commit 82a68a8771.

Smarter slow ISA penalties makes gathers still useful.
The intention is to use gathers with the final stage of non-ptwo iMDCTs,
where they give benefit.
2022-05-21 02:10:02 +02:00
Lynne 82a68a8771 x86/tx_float: remove vgatherdpd usage
Its performance loss ranges from either being just as fast as individual loads
(Skylake), a few percent slower (Alderlake), 8% slower (Zen 3), to completely
disasterous (older/other CPUs).

Sadly, gathers never panned out fast on x86, even with the benefit of time and
implementation experience.

This also saves a register, as there's no need to fill out an additional
register mask.

Zen 3 (16384-point transform):
Before: 1561050 decicycles in           av_tx (fft),  131072 runs,      0 skips
After:  1449621 decicycles in           av_tx (fft),  131072 runs,      0 skips

Alderlake:
2% slower on big transforms (65536), to 1% (131072), to a few percent for smaller
sizes.
2022-05-20 10:12:34 +02:00
Lynne 9e2deba9a9 lavu/vulkan: avoid using strlen as a loop condition
Whatever.
2022-02-22 06:30:12 +01:00
Lynne 04cc7a5548 lavu/tx: wrap missed string in NULL_IF_CONFIG_SMALL
It's the only one that isn't defined through the macros used elsewhere.
2022-02-07 04:23:31 +01:00
Lynne eac4c3574b lavu/tx: disable debugging information when CONFIG_SMALL 2022-02-07 03:56:47 +01:00
Lynne 3bbe9c5e38 lavu/tx: refactor assembly codelet definition
This commit does some refactoring to make defining assembly codelets
smaller, and fixes compiler redefinition warnings. It also allows
for other assembly versions to reuse the same boilerplate code as
x86.

Finally, it also adds the out_of_place flag to all assembly codelets.
This changes nothing, as out-of-place operation was assumed to be
available anyway, but this makes it more explicit.
2022-02-07 03:56:45 +01:00
Lynne 2e82c61055 x86/tx_float: avoid redefining macros
FFT16_FN was used for fft8 and for fft16 afterwards.
2022-02-02 07:51:45 +01:00