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Commit Graph

16 Commits

Author SHA1 Message Date
周晓勇
387cbe018c use mmi instead of loongson3 as simd-optimization flag
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2015-07-07 03:46:57 +02:00
Michael Niedermayer
da9a6f4a2b Merge commit 'eecd29b3fd7fee221580798346d6582b75c7ade4'
* commit 'eecd29b3fd7fee221580798346d6582b75c7ade4':
  ppc: vsx: Implement float_dsp

Conflicts:
	libavutil/ppc/float_dsp_init.c

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2015-05-31 23:42:36 +02:00
Luca Barbato
eecd29b3fd ppc: vsx: Implement float_dsp 2015-05-31 12:07:11 +02:00
ZhouXiaoyong
4a7b50679d makefile: add Loongson-3 support
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2015-04-27 14:10:28 +02:00
Shivraj Patil
35a7170e69 Makefile: Add support for MSA (MIPS-SIMD-Arch)
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2015-04-17 17:38:41 +02:00
James Cowgill
eae13eae9d configure, mips: remove MIPS32R2, merging it with MIPSFPU
There are no independant uses of mips32r2 instructions except for the
FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I
am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway.

Since these fpu instructions are available on mips64 (non-r2), enable them
there as well.

Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to
HAVE_MIPSFPU anyway).

mips32r2 is left in the list of options form compatability so that using
--disable-mips32r2 doesn't break anything.

Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2015-03-06 14:01:31 +01:00
Michael Niedermayer
4c57c6a765 Merge commit '8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14'
* commit '8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14':
  aarch64: add armv8 CPU flag

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2014-04-07 02:15:18 +02:00
Janne Grunau
8675bcb0ad aarch64: add armv8 CPU flag 2014-04-06 21:18:49 +02:00
Michael Niedermayer
3fc2362aef Merge commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143'
* commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143':
  Remove all SPARC architecture optimizations

Conflicts:
	Makefile
	configure
	libavcodec/sparc/dsputil_vis.c
	libavcodec/sparc/dsputil_vis.h
	libavcodec/sparc/hpeldsp_vis.c
	libavcodec/sparc/simple_idct_vis.c
	libavcodec/sparc/vis.h
	libswscale/sparc/yuv2rgb_vis.c
	libswscale/swscale_internal.h

If someone wants to maintain these (or other) SPARC optimizations, please
contact me or ffmpeg-devel.
I am happy to revert this removial if theres someone considering to
maintain this code.

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2014-03-13 22:35:47 +01:00
Diego Biurrun
b4dd424d96 Remove all SPARC architecture optimizations
SPARC is no longer being used in any multimedia-related fields and the
VIS optimizations only represent a maintenance burden.
2014-03-13 05:50:28 -07:00
Michael Niedermayer
aba1a48cc5 Merge commit 'b326755989b346d0d935e0628e8865f9b2951c30'
* commit 'b326755989b346d0d935e0628e8865f9b2951c30':
  arm: rename ARMVFP config symbol to VFP

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2012-12-08 14:24:16 +01:00
Mans Rullgard
b326755989 arm: rename ARMVFP config symbol to VFP
This is consistent with usual ARM nomenclature as well as with the
VFPV3 and NEON symbols which both lack the ARM prefix.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-12-07 16:54:04 +00:00
Michael Niedermayer
85fe70b64c Merge commit 'ca411fc1d34329cd17b28627f697e391ae52073f'
* commit 'ca411fc1d34329cd17b28627f697e391ae52073f':
  avcodec: Remove broken MMI optimizations

Conflicts:
	arch.mak
	configure
	libavcodec/avcodec.h
	libavcodec/mips/Makefile
	libavcodec/mips/dsputil_mmi.c
	libavcodec/mips/idct_mmi.c
	libavcodec/mips/mmi.h
	libavcodec/mips/mpegvideo_mmi.c
	libavcodec/options_table.h

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2012-10-13 15:25:11 +02:00
Diego Biurrun
ca411fc1d3 avcodec: Remove broken MMI optimizations
The code fails to compile and is broken beyond repair.
2012-10-12 20:56:54 +02:00
Nedeljko Babic
3827a86eac Optimization of AMR NB and WB decoders for MIPS
AMR NB and WB decoders are optimized for MIPS architecture.
Appropriate Makefiles are changed accordingly.

Cnfigure script is changed in order to support optimizations.
 Optimizations are enabled by default when compiling is done for
  mips architecture.
 Appropriate cflags are automatically set.
 Support for several mips CPUs is added in configure script.

New ffmpeg options are added for disabling optimizations.

The FFMPEG option --disable-mipsfpu disables MIPS floating point
 optimizations.
The FFMPEG option --disable-mips32r2 disables MIPS32R2
 optimizations.
The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1
 optimizations.
The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2
 optimizations.

Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Reviewed-by: Vitor Sessak <vitor1001@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2012-06-11 21:12:39 +02:00
Diego Biurrun
7bb3a302fe build: Consistently handle conditional compilation for all optimization OBJS. 2012-04-12 09:00:49 +02:00