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https://github.com/FFmpeg/FFmpeg.git
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2904db9045
* commit '994c4bc10751e39c7ed9f67ffd0c0dea5223daf2':
x86util: Port all macros to cpuflags
See d5f8a642f6
Merged-by: James Almer <jamrial@gmail.com>
294 lines
6.6 KiB
NASM
294 lines
6.6 KiB
NASM
;*****************************************************************************
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;* x86-optimized functions for yadif filter
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;*
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;* Copyright (C) 2006 Michael Niedermayer <michaelni@gmx.at>
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;* Copyright (c) 2013 Daniel Kang <daniel.d.kang@gmail.com>
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;* Copyright (c) 2011-2013 James Darnley <james.darnley@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pw_1: times 8 dw 1
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pw_8000: times 8 dw 0x8000
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pd_1: times 4 dd 1
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pd_8000: times 4 dd 0x8000
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SECTION .text
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%macro PABS 2
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%if cpuflag(ssse3)
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pabsd %1, %1
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%else
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pxor %2, %2
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pcmpgtd %2, %1
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pxor %1, %2
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psubd %1, %2
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%endif
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%endmacro
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%macro PACK 1
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%if cpuflag(sse4)
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packusdw %1, %1
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%else
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psubd %1, [pd_8000]
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packssdw %1, %1
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paddw %1, [pw_8000]
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%endif
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%endmacro
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%macro PMAXUW 2
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%if cpuflag(sse4)
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pmaxuw %1, %2
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%else
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psubusw %1, %2
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paddusw %1, %2
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%endif
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%endmacro
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%macro CHECK 2
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movu m2, [curq+t1+%1*2]
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movu m3, [curq+t0+%2*2]
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mova m4, m2
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mova m5, m2
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pxor m4, m3
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pavgw m5, m3
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pand m4, [pw_1]
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psubusw m5, m4
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RSHIFT m5, 2
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punpcklwd m5, m7
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mova m4, m2
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psubusw m2, m3
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psubusw m3, m4
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PMAXUW m2, m3
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mova m3, m2
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mova m4, m2
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RSHIFT m3, 2
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RSHIFT m4, 4
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punpcklwd m2, m7
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punpcklwd m3, m7
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punpcklwd m4, m7
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paddd m2, m3
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paddd m2, m4
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%endmacro
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%macro CHECK1 0
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mova m3, m0
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pcmpgtd m3, m2
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PMINSD m0, m2, m6
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mova m6, m3
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pand m5, m3
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pandn m3, m1
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por m3, m5
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mova m1, m3
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%endmacro
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%macro CHECK2 0
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paddd m6, [pd_1]
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pslld m6, 30
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paddd m2, m6
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mova m3, m0
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pcmpgtd m3, m2
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PMINSD m0, m2, m4
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pand m5, m3
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pandn m3, m1
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por m3, m5
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mova m1, m3
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%endmacro
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; This version of CHECK2 has 3 fewer instructions on sets older than SSE4 but I
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; am not sure whether it is any faster. A rewrite or refactor of the filter
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; code should make it possible to eliminate the move instruction at the end. It
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; exists to satisfy the expectation that the "score" values are in m1.
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; %macro CHECK2 0
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; mova m3, m0
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; pcmpgtd m0, m2
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; pand m0, m6
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; mova m6, m0
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; pand m5, m6
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; pand m2, m0
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; pandn m6, m1
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; pandn m0, m3
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; por m6, m5
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; por m0, m2
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; mova m1, m6
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; %endmacro
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%macro LOAD 2
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movh %1, %2
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punpcklwd %1, m7
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%endmacro
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%macro FILTER 3
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.loop%1:
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pxor m7, m7
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LOAD m0, [curq+t1]
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LOAD m1, [curq+t0]
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LOAD m2, [%2]
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LOAD m3, [%3]
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mova m4, m3
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paddd m3, m2
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psrad m3, 1
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mova [rsp+ 0], m0
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mova [rsp+16], m3
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mova [rsp+32], m1
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psubd m2, m4
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PABS m2, m4
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LOAD m3, [prevq+t1]
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LOAD m4, [prevq+t0]
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psubd m3, m0
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psubd m4, m1
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PABS m3, m5
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PABS m4, m5
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paddd m3, m4
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psrld m2, 1
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psrld m3, 1
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PMAXSD m2, m3, m6
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LOAD m3, [nextq+t1]
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LOAD m4, [nextq+t0]
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psubd m3, m0
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psubd m4, m1
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PABS m3, m5
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PABS m4, m5
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paddd m3, m4
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psrld m3, 1
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PMAXSD m2, m3, m6
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mova [rsp+48], m2
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paddd m1, m0
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paddd m0, m0
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psubd m0, m1
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psrld m1, 1
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PABS m0, m2
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movu m2, [curq+t1-1*2]
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movu m3, [curq+t0-1*2]
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mova m4, m2
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psubusw m2, m3
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psubusw m3, m4
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PMAXUW m2, m3
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mova m3, m2
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RSHIFT m3, 4
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punpcklwd m2, m7
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punpcklwd m3, m7
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paddd m0, m2
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paddd m0, m3
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psubd m0, [pd_1]
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CHECK -2, 0
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CHECK1
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CHECK -3, 1
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CHECK2
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CHECK 0, -2
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CHECK1
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CHECK 1, -3
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CHECK2
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mova m6, [rsp+48]
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cmp DWORD r8m, 2
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jge .end%1
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LOAD m2, [%2+t1*2]
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LOAD m4, [%3+t1*2]
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LOAD m3, [%2+t0*2]
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LOAD m5, [%3+t0*2]
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paddd m2, m4
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paddd m3, m5
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psrld m2, 1
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psrld m3, 1
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mova m4, [rsp+ 0]
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mova m5, [rsp+16]
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mova m7, [rsp+32]
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psubd m2, m4
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psubd m3, m7
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mova m0, m5
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psubd m5, m4
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psubd m0, m7
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mova m4, m2
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PMINSD m2, m3, m7
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PMAXSD m3, m4, m7
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PMAXSD m2, m5, m7
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PMINSD m3, m5, m7
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PMAXSD m2, m0, m7
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PMINSD m3, m0, m7
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pxor m4, m4
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PMAXSD m6, m3, m7
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psubd m4, m2
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PMAXSD m6, m4, m7
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.end%1:
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mova m2, [rsp+16]
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mova m3, m2
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psubd m2, m6
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paddd m3, m6
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PMAXSD m1, m2, m7
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PMINSD m1, m3, m7
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PACK m1
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movh [dstq], m1
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add dstq, mmsize/2
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add prevq, mmsize/2
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add curq, mmsize/2
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add nextq, mmsize/2
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sub DWORD r4m, mmsize/4
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jg .loop%1
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%endmacro
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%macro YADIF 0
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%if ARCH_X86_32
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cglobal yadif_filter_line_16bit, 4, 6, 8, 80, dst, prev, cur, next, w, \
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prefs, mrefs, parity, mode
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%else
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cglobal yadif_filter_line_16bit, 4, 7, 8, 80, dst, prev, cur, next, w, \
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prefs, mrefs, parity, mode
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%endif
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%if ARCH_X86_32
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mov r4, r5mp
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mov r5, r6mp
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DECLARE_REG_TMP 4,5
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%else
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movsxd r5, DWORD r5m
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movsxd r6, DWORD r6m
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DECLARE_REG_TMP 5,6
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%endif
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cmp DWORD paritym, 0
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je .parity0
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FILTER 1, prevq, curq
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jmp .ret
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.parity0:
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FILTER 0, curq, nextq
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.ret:
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RET
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%endmacro
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INIT_XMM sse4
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YADIF
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INIT_XMM ssse3
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YADIF
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INIT_XMM sse2
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YADIF
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%if ARCH_X86_32
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INIT_MMX mmxext
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YADIF
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%endif
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