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lavu/riscv: fix typo

This commit is contained in:
Rémi Denis-Courmont 2023-10-26 19:04:27 +03:00
parent a824c6f2f6
commit 04b49fb3c5

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@ -67,7 +67,7 @@ int ff_get_cpu_flags_riscv(void)
#endif
/* If RV-V is enabled statically at compile-time, check the details. */
#ifdef __riscv_vectors
#ifdef __riscv_vector
ret |= AV_CPU_FLAG_RVV_I32;
#if __riscv_v_elen >= 64
ret |= AV_CPU_FLAG_RVV_I64;