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mips: Fix potential illegal instruction error.
MSA2 optimizations are attached to MSA macros in generic_macros_msa.h. It's difficult to do runtime check for them. Remove this part of code can make it more robust. H264 1080p decoding: 5.13x==>5.12x. Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
This commit is contained in:
Shiyou Yin
Michael Niedermayer
parent
464d28c070
commit
ab04fedaaa
7
configure
vendored
7
configure
vendored
@ -450,7 +450,6 @@ Optimization options (experts only):
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--disable-mipsdsp disable MIPS DSP ASE R1 optimizations
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--disable-mipsdspr2 disable MIPS DSP ASE R2 optimizations
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--disable-msa disable MSA optimizations
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--disable-msa2 disable MSA2 optimizations
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--disable-mipsfpu disable floating point MIPS optimizations
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--disable-mmi disable Loongson SIMD optimizations
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--disable-fast-unaligned consider unaligned accesses slow
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@ -2053,7 +2052,6 @@ ARCH_EXT_LIST_MIPS="
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mipsdsp
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mipsdspr2
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msa
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msa2
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"
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ARCH_EXT_LIST_LOONGSON="
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@ -2592,7 +2590,6 @@ mipsdsp_deps="mips"
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mipsdspr2_deps="mips"
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mmi_deps_any="loongson2 loongson3"
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msa_deps="mipsfpu"
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msa2_deps="msa"
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cpunop_deps="i686"
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x86_64_select="i686"
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@ -5932,9 +5929,8 @@ elif enabled mips; then
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enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp'
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enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2'
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# MSA and MSA2 can be detected at runtime so we supply extra flags here
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# MSA can be detected at runtime so we supply extra flags here
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enabled mipsfpu && enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa' && append MSAFLAGS '-mmsa'
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enabled msa && enabled msa2 && check_inline_asm msa2 '"nxbits.any.b $w0, $w0"' '-mmsa2' && append MSAFLAGS '-mmsa2'
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# loongson2 have no switch cflag so we can only probe toolchain ability
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enabled loongson2 && check_inline_asm loongson2 '"dmult.g $8, $9, $10"' && disable loongson3
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@ -7363,7 +7359,6 @@ if enabled mips; then
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echo "MIPS DSP R1 enabled ${mipsdsp-no}"
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echo "MIPS DSP R2 enabled ${mipsdspr2-no}"
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echo "MIPS MSA enabled ${msa-no}"
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echo "MIPS MSA2 enabled ${msa2-no}"
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echo "LOONGSON MMI enabled ${mmi-no}"
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fi
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if enabled ppc; then
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@ -25,10 +25,6 @@
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#include <msa.h>
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#include <config.h>
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#if HAVE_MSA2
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#include <msa2.h>
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#endif
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#define ALIGNMENT 16
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#define ALLOC_ALIGNED(align) __attribute__ ((aligned((align) << 1)))
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@ -1119,15 +1115,6 @@
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unsigned absolute diff values, even-odd pairs are added
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together to generate 8 halfword results.
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*/
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#if HAVE_MSA2
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#define SAD_UB2_UH(in0, in1, ref0, ref1) \
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( { \
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v8u16 sad_m = { 0 }; \
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sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in0, (v16u8) ref0); \
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sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in1, (v16u8) ref1); \
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sad_m; \
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} )
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#else
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#define SAD_UB2_UH(in0, in1, ref0, ref1) \
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( { \
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v16u8 diff0_m, diff1_m; \
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@ -1141,7 +1128,6 @@
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\
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sad_m; \
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} )
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#endif // #if HAVE_MSA2
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/* Description : Insert specified word elements from input vectors to 1
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destination vector
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@ -2183,12 +2169,6 @@
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extracted and interleaved with same vector 'in0' to generate
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4 word elements keeping sign intact
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*/
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#if HAVE_MSA2
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#define UNPCK_R_SH_SW(in, out) \
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{ \
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out = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \
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}
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#else
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#define UNPCK_R_SH_SW(in, out) \
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{ \
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v8i16 sign_m; \
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@ -2196,7 +2176,6 @@
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sign_m = __msa_clti_s_h((v8i16) in, 0); \
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out = (v4i32) __msa_ilvr_h(sign_m, (v8i16) in); \
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}
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#endif // #if HAVE_MSA2
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/* Description : Sign extend byte elements from input vector and return
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halfword results in pair of vectors
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@ -2209,13 +2188,6 @@
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Then interleaved left with same vector 'in0' to
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generate 8 signed halfword elements in 'out1'
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*/
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#if HAVE_MSA2
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#define UNPCK_SB_SH(in, out0, out1) \
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{ \
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out0 = (v4i32) __builtin_msa2_w2x_lo_s_b((v16i8) in); \
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out1 = (v4i32) __builtin_msa2_w2x_hi_s_b((v16i8) in); \
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}
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#else
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#define UNPCK_SB_SH(in, out0, out1) \
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{ \
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v16i8 tmp_m; \
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@ -2223,7 +2195,6 @@
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tmp_m = __msa_clti_s_b((v16i8) in, 0); \
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ILVRL_B2_SH(tmp_m, in, out0, out1); \
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}
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#endif // #if HAVE_MSA2
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/* Description : Zero extend unsigned byte elements to halfword elements
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Arguments : Inputs - in (1 input unsigned byte vector)
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@ -2250,13 +2221,6 @@
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Then interleaved left with same vector 'in0' to
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generate 4 signed word elements in 'out1'
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*/
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#if HAVE_MSA2
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#define UNPCK_SH_SW(in, out0, out1) \
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{ \
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out0 = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \
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out1 = (v4i32) __builtin_msa2_w2x_hi_s_h((v8i16) in); \
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}
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#else
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#define UNPCK_SH_SW(in, out0, out1) \
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{ \
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v8i16 tmp_m; \
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@ -2264,7 +2228,6 @@
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tmp_m = __msa_clti_s_h((v8i16) in, 0); \
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ILVRL_H2_SW(tmp_m, in, out0, out1); \
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}
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#endif // #if HAVE_MSA2
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/* Description : Swap two variables
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Arguments : Inputs - in0, in1
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