1
0
mirror of https://github.com/FFmpeg/FFmpeg.git synced 2025-01-03 05:10:03 +02:00
Commit Graph

5670 Commits

Author SHA1 Message Date
Leo Izen
479747645f avutil/pixfmt.h: add native-endian RGB32F and RGBA32F formats
Add an AV_PIX_FMT_NE macro for RGB32FBE/RGB32FLE and also one for
RGBA32FBE/RGBA32FLE for packed 32-bit float RGB samples, and also
packed 32-bit float RGBA samples, respectively.

Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: Leo Izen <leo.izen@gmail.com>
2022-10-11 16:31:15 -03:00
Reimar Döffinger
38cd829dce
aarch64: Implement stack spilling in a consistent way.
Currently it is done in several different ways, which
might cause needless dependencies or in case of
tx_float_neon.S is incorrect.

Reviewed-by: Martin Storsjö <martin@martin.st>
Signed-off-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de>
2022-10-11 09:12:02 +02:00
Andreas Rheinhardt
a60befce40 avutil/attributes_internal: Add visibility pragma
GCC 4.0 not only added a visibility attribute, but also
a pragma to set it for a whole region of code.*
This commit exposes this via macros.

*: See https://gcc.gnu.org/gcc-4.0/changes.html

Reviewed-by: Lynne <dev@lynne.ee>
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-10-10 13:43:59 +02:00
Fei Wang
201cb35061 lavu/hwcontext_qsv: add support for 12bit content on Linux
P012, Y212 and XV36 are used for 12bit content in FFmpeg VAAPI, so
these formats should be used in FFmpeg QSV too, however the SDK only
declares support for P016, Y216 and Y416. So this commit fudged mappings
between AV_PIX_FMT_P012 and MFX_FOURCC_P016, AV_PIX_FMT_Y212 and
MFX_FOURCC_Y216, AV_PIX_FMT_XV36 and MFX_FOURCC_Y416.

Signed-off-by: Fei Wang <fei.w.wang@intel.com>
Signed-off-by: Wenbin Chen <wenbin.chen@intel.com>
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2022-10-10 09:31:34 +08:00
Haihao Xiang
aba25b391c lavu/hwcontext_qsv: add support for 10bit 4:4:4 content on Linux
XV30 is used for 10bit 4:4:4 content in FFmpeg VAAPI, so XV30 should be
used for 10bit 4:4:4 content in FFmpeg QSV too because QSV is based on
VAAPI on Linux. However the SDK only declares support for Y410 but does
nothing with the alpha in Y410, so this commit fudged a mapping between
AV_PIX_FMT_XV30 and MFX_FOURCC_Y410.

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2022-10-10 09:31:34 +08:00
Haihao Xiang
1496e7c173 lavu/hwcontext_qsv: specify Shift for each format
We can't get Shift from bit depth for some formats in the SDK. For
example, bit depth is 10, however Shift is 0 for Y410 (XV30 in FFmpeg).
In order to support these formats in the next commits, this patch
specified Shift for each format

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2022-10-10 09:31:34 +08:00
Rémi Denis-Courmont
f59a767ccd lavu/riscv: helper macro for VTYPE encoding
On most cases, the vector type (VTYPE) for the RISC-V Vector extension
is supplied as an immediate value, with either of the VSETVLI or
VSETIVLI instructions. There is however a third instruction VSETVL
which takes the vector type from a general purpose register. That is so
the type can be selected at run-time.

This introduces a macro to load a (valid) vector type into a register.
The syntax follows that of VSETVLI and VSETIVLI, with element size,
group multiplier, then tail and mask policies.
2022-10-10 02:22:12 +02:00
Lynne
bd3e552549
lavu: bump minor and add APIChanges entry for RISC-V's RVBbasic 2022-10-05 08:31:15 +02:00
Rémi Denis-Courmont
37d5ddc317 lavu/riscv: CPU flag for the Zbb extension
Unfortunately, it is common, and will remain so, that the Bit
manipulations are not enabled at compilation time. This is an official
policy for Debian ports in general (though they do not support RISC-V
officially as of yet) to stick to the minimal target baseline, which
does not include the B extension or even its Zbb subset.

For inline helpers (CPOP, REV8), compiler builtins (CTZ, CLZ) or
even plain C code (MIN, MAX, MINU, MAXU), run-time detection seems
impractical. But at least it can work for the byte-swap DSP functions.
2022-10-05 08:26:19 +02:00
Rémi Denis-Courmont
3ba5579e55 riscv: remove unnecessary #include's
Pointed out by Andreas Rheinhardt.
2022-10-05 06:54:56 +02:00
Johannes Kauffmann
a11e745b97 lavu/fixed_dsp: add missing av_restrict qualifiers
The butterflies_fixed function pointer declaration specifies av_restrict
for the first two pointer arguments. So the corresponding function
definitions should honor this declaration.

MSVC emits warning C4113 for this.

Signed-off-by: Anton Khirnov <anton@khirnov.net>
2022-10-04 10:56:12 +02:00
Andreas Rheinhardt
e4beb307ab avutil/channel_layout: Don't mention dead project
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-10-03 23:19:47 +02:00
Andreas Rheinhardt
9d52844aba avutil/tests/pixelutils: Test that all non-hw pix fmts have components
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-30 14:33:08 +02:00
Andreas Rheinhardt
36e805e9df avutil/tests/pixelutils: Use av_assert0 instead for test tools
These are test tools, so they should be picky.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-30 14:33:08 +02:00
Andreas Rheinhardt
5fe447bbb4 avutil/pixdesc: Move ff_check_pixfmt_descriptors() to its only user
Namely to lavu/tests/pixelutils.c. This way, this function will
not be included into actual binaries any more.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-30 14:33:08 +02:00
Andreas Rheinhardt
571b670e7d avutil/pixdesc: Avoid direct access to pix fmt desc array
Instead use av_pix_fmt_desc_next(). It is still possible
to check its return values by comparing it with the
(currently) expected values and the code does so.

Reviewed-by: Anton Khirnov <anton@khirnov.net>
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-30 14:33:08 +02:00
Andreas Rheinhardt
6d0a7e96e7 avutil/pixdesc: Remove always-false checks
ff_check_pixfmt_descriptors() was added in commit
20e99a9c10. At this time,
the values of enum AVPixelFormat were not contiguous;
instead there was a jump from 111 to 291 (or from 115
to 295 depending upon AV_PIX_FMT_ABI_GIT_MASTER).
ff_check_pixfmt_descriptors() accounts for this
by skipping empty descriptors. Yet this issue no longer
exists: There are no holes.

The check for said holes makes GCC believe that the name
can be NULL; because it is used as argument corresponding to
%s in a log statement, it therefore emits a warning
(since d75c4693fe). Therefore
this commit simply removes these checks.

Also move the checks for name before the log statement.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-30 14:33:08 +02:00
Andreas Rheinhardt
3d8754cd09 avutil/display: Drop wrong comments about matrices being allocated
These functions work just as well with stack based matrices.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-29 00:05:32 +02:00
James Almer
299253ae1b avutil/channel_layout: move and improve the comment about unknown orders
Don't place it as doxy specific for the order field, and generalize it both to
also cover already defined orders and to not make it seem like the user is
required to handle a layout they don't fully support or understand.

Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-28 12:21:18 -03:00
James Almer
bcd2e7d685 avutil/version: bump minor for the new RISC-V cpu flags
Forgotten in 0c0a3deb18.

Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-28 12:21:18 -03:00
Rémi Denis-Courmont
c47ebfa141 lavu/riscv: helper to read the vector length 2022-09-28 11:43:17 +02:00
Rémi Denis-Courmont
c1bb19e263 lavu/fixeddsp: RISC-V V butterflies_fixed 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
cd77662953 lavu/floatdsp: RISC-V V scalarproduct_float 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
b493370662 lavu/floatdsp: RISC-V V vector_fmul_window 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
9aeb6aca3a lavu/floatdsp: RISC-V V vector_fmul_reverse 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
47ce9735cc lavu/floatdsp: RISC-V V butterflies_float 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
f4ea45040f lavu/floatdsp: RISC-V V vector_fmul_add 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
d120ab5b91 lavu/floatdsp: RISC-V V vector_dmac_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
c3db27ba95 lavu/floatdsp: RISC-V V vector_fmac_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
da169a210d lavu/floatdsp: RISC-V V vector_dmul 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
7058af9969 lavu/floatdsp: RISC-V V vector_fmul 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
89b7ec65a8 lavu/floatdsp: RISC-V V vector_dmul_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
a6c10d05fe lavu/floatdsp: RISC-V V vector_fmul_scalar
This is based on existing code from the VLC git tree with two minor
changes to account for the different function prototypes.
2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
39357cad37 lavu/riscv: fallback macros for SH{1, 2, 3}ADD
Those mnemonics require the very latest binutils release at the time of
writing. These macros provide seamless backward compatibility.
2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
0c0a3deb18 lavu/cpu: CPU flags for the RISC-V Vector extension
RVV defines a total of 12 different extensions, including:

- 5 different instruction subsets:
  - Zve32x: 8-, 16- and 32-bit integers,
  - Zve32f: Zve32x plus single precision floats,
  - Zve64x: Zve32x plus 64-bit integers,
  - Zve64f: Zve32f plus Zve64x,
  - Zve64d: Zve64f plus double precision floats.

- 6 different vector lengths:
  - Zvl32b (embedded only),
  - Zvl64b (embedded only),
  - Zvl128b,
  - Zvl256b,
  - Zvl512b,
  - Zvl1024b,

- and the V extension proper: equivalent to Zve64f and Zvl128b.

In total, there are 6 different possible sets of supported instructions
(including the empty set), but for convenience we allocate one bit for
each type sets: up-to-32-bit ints (RVV_I32), floats (RVV_F32),
64-bit ints (RVV_I64) and doubles (RVV_F64).

Whence the vector size is needed, it can be retrieved by reading the
unprivileged read-only vlenb CSR. This should probably be a separate
helper macro if needed at a later point.
2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
746f1ff36a lavu/riscv: initial common header for assembler macros 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont
b95e2fbd85 lavu/cpu: detect RISC-V base extensions
This introduces compile-time and run-time CPU detection on RISC-V. In
practice, I doubt that FFmpeg will ever see a RISC-V CPU without all of
I, F and D extensions, and if it does, it probably won't have run-time
detection. So the flags are essentially always set.

But as things stand, checkasm wants them that way. Compare the ARMV8
flag on AArch64. We are nowhere near running short on CPU flag bits.
2022-09-27 13:19:52 +02:00
Andreas Rheinhardt
8be6552aa4 avutil/pixdesc: Add av_chroma_location_(enum_to_pos|pos_to_enum)
They are intended as replacements for avcodec_enum_to_chroma_pos()
and avcodec_chroma_pos_to_enum().

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
2022-09-26 03:02:25 +02:00
Paul B Mahol
7bb0afc245 avutil: add RGBA single-float precision packed formats 2022-09-25 18:34:48 +02:00
Paul B Mahol
63bb6d6a9b avutil: add RGB single-precision float formats 2022-09-25 18:34:48 +02:00
Lynne
f21899db7d
x86/tx_float: enable AVX-only split-radix FFT codelets
Sandy Bridge, Ivy Bridge and Bulldozer cores don't support FMA3.
2022-09-24 04:16:55 +02:00
James Almer
d2f482965f x86/tx_float: fix some symbol names
Should fix compilation on MacOS

Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-23 18:53:05 -03:00
James Almer
0d8f43c74d x86/tx_float: change a condition in a preprocessor check
Fixes compilation with yasm.

Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-23 16:05:07 -03:00
James Almer
750f378bec x86/tx_float: add missing preprocessor wrapper for AVX2 functions
Fixes compilation with old assemblers.

Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-23 15:15:20 -03:00
Lynne
e7a987d7c9
lavu/tx: remove special -1 inverted lookup mode
It was somewhat hacky and unnecessary.
2022-09-23 12:35:28 +02:00
Lynne
74e8541bab
x86/tx_float: generalize iMDCT
To support non-aligned buffers during the post-transform step, just iterate
backwards over the array.

This allows using the 15xN-point FFT, with which the speed is 2.1 times
faster than our old libavcodec implementation.
2022-09-23 12:35:28 +02:00
Lynne
ace42cf581
x86/tx_float: add 15xN PFA FFT AVX SIMD
~4x faster than the C version.
The shuffles in the 15pt dim1 are seriously expensive. Not happy with it,
but I'm contempt.

Can be easily converted to pure AVX by removing all vpermpd/vpermps
instructions.
2022-09-23 12:35:27 +02:00
Lynne
3241e9225c
x86/tx_float: adjust internal ASM call ABI again
There are many ways to go about it, and this one seems optimal for both
MDCTs and PFA FFTs without requiring excessive instructions or stack usage.
2022-09-23 12:33:35 +02:00
Lynne
7e7baf8ab8
lavu/tx: do not steal lookup tables of subcontexts in the iMDCT
As it happens, some still need their contexts.
2022-09-23 12:33:31 +02:00
James Almer
05cff214b9 avutil/channel_layout: mention how the API user should treat channel orders it does not understand
In case new orders are added in the future, existing library users can still
use the layout simply by ignoring everything but the channel count in it, so
make this explicit.

Reviewed-by: Anton Khirnov <anton@khirnov.net>
Signed-off-by: James Almer <jamrial@gmail.com>
2022-09-22 10:22:19 -03:00